Patents Assigned to UDMTEK
  • Publication number: 20250094773
    Abstract: A method, of training an anomaly detecting model using a plurality of pieces of graph data, includes: (a) inputting one piece of graph data that has not yet been input, among the plurality of pieces of graph data, to a graph neural network (GNN) AutoEncoder calculating a probability of each edge as input data; (b) calculating a difference value (hereinafter, “edge difference value”) between an edge probability value of reconstructed data output by the GNN AutoEncoder and an edge value of the input data; (c) calculating an average value (hereinafter, “positive edge loss”) of a positive edge and an average value (hereinafter, “negative edge loss”) of a negative edge using the edge difference value, and calculating an edge prediction loss value of the reconstructed data by summing the positive edge loss and the negative edge loss; (d) retraining the GNN AutoEncoder until the edge prediction loss value is minimized.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 20, 2025
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Jun Pyo Park, Seung Woo Han, Geun Ho Yu, Min Young Jung, Hee Chan Yang, Seung Jong Jin
  • Publication number: 20240427305
    Abstract: A method of inspecting a programmable logic controller (PLC) control logic using a graphic neural network (GNN) generally includes three operations: a data preprocessing operation for a GNN, an operation of predicting whether tags are connected, and an operation of verifying suitability of edge connections between tags. As a result, a graph is generated from a PLC control logic and input to a link prediction model to find an incorrect connection in the PLC control logic. Subsequently, a result graph output through the link prediction is input to a trained model to verify edge connection suitability between tags. Then, it may be finally verified whether tags are connected in the PLC control logic.
    Type: Application
    Filed: November 12, 2021
    Publication date: December 26, 2024
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Jun Pyo Park, Sang Chul Yoo, Kang Hee Han, Seung Woo Han, Yeon Dong Kim, Nam Ki Kim
  • Publication number: 20240168450
    Abstract: The present disclosure discloses a method of generating a master state that is a normal state in a repeated cycle by analyzing log data output from a programmable logic controller (PLC). In addition, a method of generating log data as graph data as data preprocessing for generating a master state is disclosed. The method of generating a master pattern and the method of training a cycle analysis model according to the present disclosure are different from the related art in that the methods are a technology of processing a machine control language (low-level language) that is difficult for humans to analyze and converting the machine control language into an analyzable language (high-level language), i.e., a machine language processing (MLP)-based technology that analyzes the executed machine language (a language that controls a machine) with a computer and can be understood by humans.
    Type: Application
    Filed: November 12, 2021
    Publication date: May 23, 2024
    Applicant: UDMTEK
    Inventors: Gi Nam Wang, Jun Pyo Park, Seung Woo Han, Kang Hee Han, Min Young Jung, Sang Chul Yoo, Geun Ho Yu
  • Publication number: 20230027840
    Abstract: Disclosed is a method of analyzing a programmable logic controller (PLC) logic to detect whether an anomaly that deviates from a standard pattern occurs in a repeated cycle. After modeling and patterning an operation pattern of automation equipment and processes with a graph, an anomaly detecting model capable of detecting whether a pattern is abnormal may be constructed as a graph AutoEncoder model. By detecting the change in the process pattern, it is possible to early detect the anomaly of the equipment and processes.
    Type: Application
    Filed: July 20, 2022
    Publication date: January 26, 2023
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Jun Pyo Park, Seung Woo Han, Geun Ho Yu, Min Young Jung, Hee Chan Yang, Seung Jong Jin
  • Publication number: 20220342375
    Abstract: The present disclosure discloses a master pattern generation method which is a major pattern in a repeated cycle by analyzing programmable logic controller (PLC) logic, and a method for training a model that may analyze an error of a cycle using the generated master pattern. The master pattern generation method and the training method for a cycle analysis model according to the present disclosure are different from the related art in that the methods are a technology of processing a machine control language (low-level language) that is difficult for humans to analyze and converting the machine control language into an analyzable language (high-level language), i.e., a machine language processing (MLP)-based technology that analyzes the executed machine language (a language that controls a machine) with a computer and cats be understood by humans.
    Type: Application
    Filed: April 8, 2022
    Publication date: October 27, 2022
    Applicant: UDMTEK
    Inventors: Gi Nam Wang, Jun Pyo Park, Yeon Dong Kim, Nam Ki Kim, Hee Chan Yang, Yoon Woo Ha, Seung Jong Jin
  • Publication number: 20140055273
    Abstract: A method of alarming an abnormal state of a line of an automated manufacturing system using a programmable logic controller (PLC) signal pattern is provided.
    Type: Application
    Filed: July 22, 2011
    Publication date: February 27, 2014
    Applicant: UDMTEK CO., LTD.
    Inventors: Hyeong Tae Park, Chol Hwan Kim, Gi Nam Wang, Sang Chul Park, Jin Young Cho, Jung Ho Nam
  • Patent number: 8612200
    Abstract: Disclosed are a PLC (Programmable Logic Controller) symbol structure for a PLC code for automatically generating an input/output model, and a simulation apparatus and a simulation method for testing the PLC code using the same. In one embodiment, a computer-readable recording medium records a PLC code including a plurality of PLC symbols, wherein each of the PLC symbols includes a plurality of levels identified by an identifier, and a computer automatically generates an input/output model using the structure of each of the PLC symbols, thereby performing a simulation for testing the PLC code. The PLC symbol structure according to one embodiment systematically contains information required for automatically generating the input/output model, making it possible to automatically generate the input/output model for testing the PLC code in an easier manner without knowledge of simulation and modeling, and reducing the time consumed and the labor required for generating the input/output model.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: December 17, 2013
    Assignee: UDMTEK Co., Ltd.
    Inventors: Gi Nam Wang, Sang Chul Park, Hyeong Tae Park
  • Patent number: 8543370
    Abstract: A multiple programmable logic controller (PLC) simulation system is provided.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: September 24, 2013
    Assignee: UDMTEK Co., Ltd.
    Inventors: Gi Nam Wang, Jong Geun Kwak
  • Publication number: 20130127444
    Abstract: An apparatus and method for distinguishing between tack-welding and welding are provided. The apparatus for distinguishing between tack-welding and welding includes: a current sensor configured to detect arc current of a welder; and a distinguish control unit configured to distinguish whether a welding operation performed by the welder is tack-welding or welding based on the arc current detected by the current sensor for a predefined period of time. Accordingly, the amount of work performed by a welding worker can be fairly and accurately evaluated.
    Type: Application
    Filed: July 27, 2011
    Publication date: May 23, 2013
    Applicant: UDMTEK CO., LTD.
    Inventors: Eui Koog Ahn, Lock-Jo Koo, hee won Jo, Seung Taek Hong, Chang Ho Lee, Gi Nam Wang, Sang Chul Park
  • Publication number: 20130132059
    Abstract: A multiple programmable logic controller (PLC) simulation system is provided.
    Type: Application
    Filed: March 22, 2012
    Publication date: May 23, 2013
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Jong Geun Kwak
  • Publication number: 20130112678
    Abstract: Provided are a system and a method for monitoring welding operations. The system includes a welding machine, a current sensor sensing an operation time of the welding machine and a welding current, a welding information database storing information of the operation time of the welding machine and the welding current for each welding operator and storing information of a consumed charge amount of the welding machine, which is preset for each welding operation process, a data analyzer checking a charge amount consumed for the operation time by using the sensed operation time of the welding machine and the welding current and determining whether the welding operator achieves a task goal of a corresponding process by comparing the checked consumed charge amount with the preset consumed charge amount for a process performed by the welding machine, and a display unit outputting a result of the determining, performed by the data analyzer, whether the welding operator achieves a task goal of a corresponding process.
    Type: Application
    Filed: June 5, 2011
    Publication date: May 9, 2013
    Applicant: UDMTEK CO., LTD.
    Inventors: Jae Geun Park, Yong Woo Kang, Tae Hyuck Yoon, Eui Koog Ahn, Lock-Jo Koo, Hee Won Jo, Seung Taek Hong, Chang Ho Lee, Gi Nam Wang, Sang Chul Park
  • Publication number: 20120022849
    Abstract: Disclosed are a PLC (Programmable Logic Controller) symbol structure for a PLC code for automatically generating an input/output model, and a simulation apparatus and a simulation method for testing the PLC code using the same. In one embodiment, a computer-readable recording medium records a PLC code including a plurality of PLC symbols, wherein each of the PLC symbols includes a plurality of levels identified by an identifier, and a computer automatically generates an input/output model using the structure of each of the PLC symbols, thereby performing a simulation for testing the PLC code. The PLC symbol structure according to one embodiment systematically contains information required for automatically generating the input/output model, making it possible to automatically generate the input/output model for testing the PLC code in an easier manner without knowledge of simulation and modeling, and reducing the time consumed and the labor required for generating the input/output model.
    Type: Application
    Filed: March 24, 2010
    Publication date: January 26, 2012
    Applicant: UDMTEK CO., LTD.
    Inventors: Gi Nam Wang, Sang Chul Park, Hyeong Tae Park