Patents Assigned to Ultra Chip, Inc.
  • Publication number: 20110012859
    Abstract: A resistance type touch panel includes a first substrate, a second substrate and a detection module. The first substrate further includes a touch module at a bottom surface thereof facing the second substrate, in which the touch module has a plurality of conductive blocks having individual signal lines. The second substrate includes a bias-layer module at an upper surface thereof opposing to the touch module by a predetermined spacing. The bias-layer module further includes at least four bias points accounted for at least two voltage biases along two directions. The detection module is electrically coupled with the signal lines of the touch module for realizing all the voltage changes among the conductive blocks.
    Type: Application
    Filed: December 4, 2009
    Publication date: January 20, 2011
    Applicant: ULTRA CHIP INC.
    Inventors: WEN-KUEI LAI, SHIH-HSIN JUAN, CHENG-HSIN LU, WEI-LUNG HUANG, YI-CHEN LO, CHIH-JUNG CHEN
  • Patent number: 7394164
    Abstract: A semiconductor device has a plurality of bumps in a same row for staggered probing. The bumps in a same row are disposed on a chip and include a plurality of regular bumps and a plurality of irregular bumps. The regular bumps and the irregular bumps are interspersed in a same pitch. Along a defined line, the widths of the irregular bumps are narrower than the ones of the regular bumps for fine pitch applications. Additionally, the irregular bumps have a plurality of integral probed portions far away the line, top surfaces of which are expanded such that probed points can be defined on the probed portions for staggered probing.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: July 1, 2008
    Assignee: Ultra Chip, Inc.
    Inventors: Bing-Yen Peng, Ho-Cheng Shih