Patents Assigned to Uniden San Diego Research & Development Center
  • Patent number: 6127894
    Abstract: A shunt feedback circuit path for use in high frequency amplifiers fabricated as a transmission line coupled to ground at one end and coupled to the shunt feedback transmission line of the amplifier at the other end. The shunt feedback transmission line has a first and second resistive element and a first and second capacitive element. A quarter-wavelength transmission line is used to transform the impedance coupled to one end with respect to the other end. The impedance as seen from one end of the line is a function of the characteristic impedance of the line. Therefore, by selecting the characteristic impedance the transmission line can be used to affect the impedance of the feedback path so the transmission line appears as an inductor of reactance equal to the characteristic impedance of the quarter-wavelength transmission line and reduces the overall effective length of the feedback path.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: October 3, 2000
    Assignee: Uniden San Diego Research & Development Center, Inc.
    Inventor: Martin Alderton
  • Patent number: 6064270
    Abstract: A system for compensating for reference frequency drift in a communications system. The inventive system includes a frequency source for providing a reference frequency. An error determination circuit determines if the reference frequency is within a predetermined range of a desired reference frequency and provides an error signal in response thereto. A frequency correction circuit steps the reference frequency up and/or down by a predetermined amount in response to the error signal until the reference frequency is within the predetermined range of the desired reference frequency. In a specific embodiment, the predetermined amount is twice the short-term capture range of the reference frequency which corresponds to approximately four parts per million. The predetermined range is the short-term capture range or two parts per million. The predetermined range is dependent upon the reference frequency band in which the receiver can successfully receive and decode the receive signal.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: May 16, 2000
    Assignee: Uniden San Diego Research & Development Center
    Inventor: Robert Keith Douglas
  • Patent number: 6034573
    Abstract: A method and apparatus for continuously calibrating the modulation sensitivity of a voltage controlled oscillator (VCO) within a modulator of a transmitter. In accordance with the present invention, the transmitter is coupled to the receiver in order to loop back the transmit signal. The present invention includes a baseband signal generator which generates a reference baseband signal of known amplitude during periods when no other baseband information is being applied to the transmitter by the user. A Signal and Reference Comparison Circuit (SRCC) receives the output from the demodulator and determines whether the VCO within the transmitter has the proper modulation sensitivity. If the modulation sensitivity of the VCO is not within a desired range, then a signal generated by the SRCC is applied to a baseband level control circuit to adjust the level of the baseband signal that is applied to the VCO.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: March 7, 2000
    Assignee: Uniden San Diego Research & Development Center, Inc.
    Inventor: Martin Alderton
  • Patent number: 6025758
    Abstract: The present invention includes a method for generating a GMSK modulating signal from a serial digital data bit stream whereby the GMSK modulating signal modulates a carrier frequency signal associated with a GMSK transmitter of a digital communications system. Specifically, the method includes converting each set of m consecutive data bits of the bit stream into a parallel symbol, whereby there are 2.sup.m possible symbols. Each symbol is generally defined as (B.sub.-(m-1). . . B.sub.0), where B.sub.0 is the current data bit and B.sub.-(m-1) is the mth previous data bit with respect to B.sub.0. Next, a corresponding phase advance is assigned to each of the 2.sup.m symbols, each phase advance being substantially equivalent to a percent phase advance contributed by the m consecutive data bits of each symbol. Also, four corresponding accumulated phases are assigned to each of the 2.sup.m symbols, each accumulated phase being derived from a multiple of 90 degrees.
    Type: Grant
    Filed: October 30, 1997
    Date of Patent: February 15, 2000
    Assignee: Uniden San Diego Research & Development Center, Inc.
    Inventor: Keh-Shehn Lu
  • Patent number: 6005756
    Abstract: A circuit for grounding a signal at a first frequency and at a second frequency. The circuit includes a first capacitor and an inductor in series and a second capacitor in parallel with the first capacitor and inductor. The first capacitor is series resonant at the first frequency and the second capacitor is series resonant at the second frequency. The inductance of the inductor is selected so the combination of the packaging inductance of the first capacitor and the inductor parallel resonants with the second capacitor at a frequency lower than the second frequency and higher than the first frequency, where the second frequency is greater than the first frequency. The grounding circuit may be used to provide a second input to a balanced RF mixer where the RF mixer receives a RF signal at the second frequency at a first input and generates an IF signal at the first frequency.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: December 21, 1999
    Assignee: Uniden San Diego Research & Development Center, Inc.
    Inventor: Mark Lane
  • Patent number: 5991346
    Abstract: A method for determining the best time to sample data bits of a data bit stream of a received information signal in a digital communication system includes the steps of determining the current derivative of a respective sample of the information signal, weighting the sample by a predetermined amount, determining an accumulated derivative value for the same sample number of a previous symbol of the information signal, weighting the previous accumulated derivative value by another predetermined amount, summing the two weighted values together and assigning this accumulated derivative value to the respective sample. The method further includes the step of comparing the accumulated derivative values of a predetermined number of consecutive samples to determine which sample has the greatest accumulated derivative value. The sample having the greatest accumulated derivative value substantially corresponds to the beginning of a symbol.
    Type: Grant
    Filed: April 2, 1997
    Date of Patent: November 23, 1999
    Assignee: Uniden San Diego Research and Development Center, Inc.
    Inventor: Keh-Shehn Lu
  • Patent number: 5970075
    Abstract: A method and apparatus which corrects errors in a receive vector and a receiver. An essentially conventional method and apparatus are used to produce a polynomial representation of the receive vector, syndromes associated with the receive vector, and a Galios Field table. An inventive method and apparatus is used to generate an error location polynomial table and thus an error location polynomial which can then be used to locate and correct a maximum number of errors in the receive vector. The inventive method includes comparing previously generated entities in an error location polynomial table to one another to determine which of the previously generated entries should be used in generating a next entry to the error location polynomial table.
    Type: Grant
    Filed: June 18, 1997
    Date of Patent: October 19, 1999
    Assignee: Uniden San Diego Research and Development Center Inc.
    Inventor: Langford M. Wasada
  • Patent number: 5956627
    Abstract: A temperature compensation technique employing a directional coupler providing signals from a forward sample port to a detector circuit for providing a DC output representative of transmitted power. A temperature compensation circuit including a current source is coupled to a reverse sample port of the directional coupler for providing a compensating DC bias current via said coupler, to the detector circuit. The detector circuit and the temperature compensation circuit each include matched diodes and corresponding circuits for tracking temperature and offsetting the effects of temperature on the DC output of the detector circuit.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: September 21, 1999
    Assignee: Uniden San Diego Research & Development Center, Inc.
    Inventor: Jeffrey J. Goos
  • Patent number: 5896422
    Abstract: A method for setting a bit determination threshold for determining the logic state of a bit in a data bit stream of an NRZ (non-return-to-zero) signal in a GMSK (gaussian minimum shift keying) communication system includes the step of sensing the occurrence of a "flat top" bit in the data bit stream, which signifies the occurrence of a first string of successive same state bits in the data bit stream, where the bits are in a first logic state, such as logic 1. The average bit amplitude of the information signal corresponding to the "flat top" bit of the first string is determined. The occurrence of a second "flat top" bit in the data bit stream which signifies the occurrence of a second string of successive same state bits which are of an opposite logic state, such as logic 0, is then sensed, and the average bit amplitude of the second "flat top" bit of the second string is determined.
    Type: Grant
    Filed: March 6, 1997
    Date of Patent: April 20, 1999
    Assignee: Uniden San Diego Research and Development Center, Inc.
    Inventor: Keh-Shehn Lu