Patents Assigned to Union Semiconductor Technology Corporation
  • Patent number: 7431705
    Abstract: Methods of making a multi component module (130) utilize a reusable carrier substrate (111) where the reusable carrier substrate (111) is light transmissive in a frequency range of an adhesive (112) that is ablated by light of a certain frequency such as light from an excimer laser (122). An electronic component (118), such as a chip, die, or passive or active component, is adhered to the reusable carrier substrate (111) with the adhesive (112). An interconnect structure (117) is fabricated on the electronic component (118) to form a multi component module (130). The excimer laser (122) illuminates the reusable carrier substrate (111) with light in the frequency range after fabricating the interconnect structure (117) to ablate the adhesive (112) to remove the multi component module (130) from the reusable carrier substrate (111).
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: October 7, 2008
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wendy Lee Wilkins
  • Patent number: 7126844
    Abstract: An apparatus for improving stability of a magnetoresistive random access memory over process and operational variations includes a current reference circuit that provides a reference current control signal to variable analog control circuitry. The variable analog control circuitry is connected to receive control signals from the current reference. The variable analog control circuitry generates a word current reference signal in response to the reference current control signal and further generates a source current reference signal in response to the reference current control signal. At least one word current source is connected to receive the word current reference signal. At least one sense current source is connected to receive the source current reference signal.
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: October 24, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 7113422
    Abstract: A method to adjust an operating parameter of a magnetoresistive random access memory having a tunable circuit, such as a bias control circuit, provides for measuring the operating parameter, such as a word current or sense current, of the magnetoresistive random access memory to obtain a measured operating parameter result and tuning the tunable circuit, such as with trimmable resistors, based on the measured operating parameter result. A method is also provided to adjust an operating parameter of a wafer of magnetic random access memories each having a tunable circuit by measuring the operating parameter one or more of the magnetic random access memories to obtain a measured operating parameter result and tuning some or all of the tunable circuits based on the measured operating parameter result.
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: September 26, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 7082050
    Abstract: A magnetic random access memory (10) with equalization has a plurality of magnetic memory elements that perform a memory operation. A word line magnetically activates at least one magnetic memory element. A sense line detects the state of the at least one magnetic memory element. A word line driver is connected to the word line to drive a current on the word line during the memory operation. A word line equalizer is connected to the word line to equalize the word line during the non-memory operations.
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: July 25, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 7054185
    Abstract: A word current source (445) for a magnetoresistive random access memory circuit (420) includes an n-channel transistor (430) including a gate, a source and a drain, where the source is coupled to a supply ground, and the drain is coupled to the magnetoresistive random access memory circuit. A positive supply voltage is coupled to the magnetoresistive random access memory circuit (420) so as to allow current to flow through the magnetoresistive random access memory circuit (420) when an activation signal is applied to the gate by the control circuit.
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: May 30, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 7022247
    Abstract: Methods of making a sharp pointed structure (19), such as a sharp pointed structure in a semiconductor, includes providing a substrate (14) and then depositing an oxide layer (16), such as silicon oxide or silicon nitride, on the substrate (14) and depositing a low contrast photoresist (17) on the oxide layer (16). The low contrast photoresist (17) is then exposed to optical energy through a reticle (21), with the reticle (21) having a partially triangular shape (22), such as an equilateral triangle with a tip. The low contrast photoresist (17) is developed and the oxide layer (16) is etched to form the sharp pointed structure (19). Additionally, a film is deposited (15), such as a magnetoresistive layer, between the substrate (14) and the oxide layer (16). The low contrast photoresist (17) is removed and the film (15) is etched to create a sharp pointed film structure (23) in the film (15).
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: April 4, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventors: Hans Peter Mikelson, George James Lobos
  • Patent number: 7023753
    Abstract: A current controlled sense current source having a current source with a stable reference current output is provided with a sense current source having a sense current reference input connected to the stable reference current output with the sense current source having a sense current output. A current controlled word current source comprising a current source having a stable reference current output is also provided with a word current source having a word current reference input connected to the stable reference current output with the word current source having a word current output.
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: April 4, 2006
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 6920076
    Abstract: A semiconductor device includes a first power pad, a second power pad, a first adjacent bus pair, and a second adjacent bus pair. The first power pad is operable to supply a first potential, and the second power pad operable to supply a second potential. The first adjacent bus pair is disposed on a first layer of the semiconductor device and connected to the first and second power pad. The second adjacent bus pair is disposed on the second layer of the semiconductor device and is connected to the first and second power pads, and is also underlying the first adjacent bus pair.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: July 19, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Arthur Theel
  • Patent number: 6920072
    Abstract: A semiconductor device includes a primary memory array, primary addressing circuitry, a redundant memory array, redundant addressing circuitry, and a first signal pad. The primary memory array includes primary memory elements operable to store data, and the primary addressing circuit is operable to select the primary memory elements. The redundant memory array includes redundant memory elements operable to store data and is also operable to be programmed from a programmable state to provide redundant memory elements for defective primary memory elements. The first signal pad is operable to receive serial selection data, and the redundant addressing circuit is connected to the first signal pad and is operable to receive the serial selection data from the first signal pad and select the redundant memory elements in response.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: July 19, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Arthur Theel
  • Patent number: 6912171
    Abstract: A semiconductor device a first power pad, a second power pad, a first power network, and a second power network. The first power pad is operable to supply a first potential, and the second power pad is operable to supply a second potential. The first power network defines a first periphery in the semiconductor device and is coupled to the first power pad and the second power pad. The second power network defines a second periphery in the semiconductor device and is coupled to the first power pad and the second power pad.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: June 28, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Arthur Theel
  • Patent number: 6909629
    Abstract: MRAM sensing operations use a word line (80, 82, 84, 86) and a sense current to detect the state of a bit (70, 72). The bit (70, 72) has a high resistance or a low resistance state. Using multiple sub bits (30, 32, 34, 36, 38, 40, 42, 44) in each bit (70, 72) increases the difference between the high resistance and low resistance state in proportion to the number of sub bits (30, 32, 34, 36, 38, 40, 42, 44) in each bit (70, 72). Multiple sub bits (30, 32, 34, 36, 38, 40, 42, 44) also provide redundancy in the event of failure of a sub bit (30, 32, 34, 36, 38, 40, 42, 44). The MRAM can be designed to function with one or more sub bits (30, 32, 34, 36, 38, 40, 42, 44) being defective.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: June 21, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Wayne Theel
  • Patent number: 6861336
    Abstract: A die thinning method includes providing a wafer (10) and depositing a substrate bonding material on the wafer. The die thinning method places a plurality of die (12) on the wafer (10), cures the substrate bonding material to secure the individual ICs to the base wafer (10), and covers the substrate (10) and the die (12) with a mask material. The substrate bonding material is BCB. The mask material is a photoresist (14). The method further back grinds the wafer to remove the wafer and to reduce the original die thickness from 26 mils to 5 mils. A UV transfer tape (22) is applied to the die (12) on a film frame (20). The mask material and back grinding tape (18) are then removed. The plurality of die (12), UV transfer tape (22), and film frame (20) are placed face down in a UV cure station. The UV transfer tape (22) is UV irradiated and the plurality of die (12) are removed from the UV transfer tape (22).
    Type: Grant
    Filed: November 30, 2003
    Date of Patent: March 1, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventor: Kevin Wade Hampton
  • Patent number: 6855638
    Abstract: A method processes a thick TiW metal layer (12) on a dielectric layer (15), where the dielectric layer (15) has been deposited on a substrate (14), such as a silicon substrate. The method deposits the TiW metal layer (12) onto the dielectric layer (15), such as silicon dioxide or silicon nitride, and then deposits a photoresist (10) over the TiW metal layer (12). The method removes substantially all of the TiW metal layer (12) not in contact with the photoresist (10) with a uniform etch, such as not more than 80% to 90% of the deposited TiW metal layer. Then, the TiW metal layer (12) is selectively etched to the dielectric layer (15), to remove the TiW metal layer (12) faster than the dielectric layer (15), such as 2.7 times faster.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: February 15, 2005
    Assignee: Union Semiconductor Technology Corporation
    Inventors: Hans Peter Mikelson, Michael Paul Fleischer, Gloria Marie Lee, Jason Christopherson