Patents Assigned to Unistars
  • Patent number: 10651354
    Abstract: An optoelectronic package includes a carrier, a light emitting die, a cover, and an encapsulation material. The carrier has a carrying plane and a wiring layer on the carrying plane. The light emitting die is mounted on the carrying plane and electrically connected to the wiring layer. The cover is connected to carrier. A cavity is formed between the cover and the carrier, and the light emitting die is within the cavity. The encapsulation material formed on the carrier surrounds the cover. The encapsulation material completely covers the interface between the cover and carrier.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: May 12, 2020
    Assignee: UNISTARS CORPORATION
    Inventors: Shang-Yi Wu, Liang-Kuei Huang, Pao-Ya Wang
  • Patent number: 10215937
    Abstract: An optoelectronic package includes a wiring substrate having a holding plane, an optoelectronic chip, a reflective material, an optical element and an adhesive. The optoelectronic chip is mounted on the holding plane and electrically connected to the wiring substrate. The optoelectronic chip has an upper surface, a functional region and a side surface connected to the upper surface. The reflective material is on the holding plane and surrounds the optoelectronic chip. The reflective material covers the side surface and has an inclined surface. The inclined surface surrounds the upper surface and extends from an edge of the upper surface. The height of the reflective material at the inclined surface decreases from the optoelectronic chip toward a direction away from the optoelectronic chip. The adhesive covers the reflective material and the upper surface and is connected between the optoelectronic chip and the optical element.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: February 26, 2019
    Assignee: UNISTARS CORPORATION
    Inventors: Shang-Yi Wu, Hsin-Hsien Hsieh
  • Patent number: 10153459
    Abstract: An optoelectronic package includes a substrate, a light emitting chip, an optical sealant, and an optical scattering layer. The substrate has a carrying plane and a wiring layer formed on the carrying plane. The light emitting chip used for emitting a light ray is mounted on the carrying plane and electrically connected to the wiring layer. The optical sealant covers the carrying plane and wraps the light emitting chip. The optical sealant is located in the path of the light ray. The optical scattering layer covers the optical sealant. The optical sealant located in the path of the light ray is formed between the substrate and the optical scattering layer. Preferably, the refractive index of the optical sealant is larger than or equal to the refractive index of the optical scattering layer.
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: December 11, 2018
    Assignee: UNISTARS CORPORATION
    Inventors: Shang-Yi Wu, Hsin-Hsien Hsieh
  • Patent number: 10121943
    Abstract: A light emitting package base structure includes a carrier, a light emitting chip, a light transmission unit and a dam. The carrier has a supporting surface and an outer surface surrounding the supporting surface. The light emitting chip is disposed on the supporting surface and electrically connected to the carrier. The light transmission unit is disposed on the carrier and has a through hole. The dam is disposed between the carrier and the light transmission unit, and a hermetic receiving space is formed between the dam, the light transmission unit and the carrier. The light emitting chip is located in the hermetic receiving space and the dam has a side surface away from the hermetic receiving space. A gap is formed between the side surface and the outer surface, and the through hole is corresponded to a location between the side surface and the outer surface.
    Type: Grant
    Filed: June 11, 2017
    Date of Patent: November 6, 2018
    Assignee: UNISTARS CORPORATION
    Inventors: Liang-Kuei Huang, Shang-Yi Wu
  • Patent number: 10062815
    Abstract: A light emitting device includes a carrier, a light emitting chip, and a covering part disposed on the carrier. The carrier includes a board, a guiding metal layer, and a sealing material. The board has a first surface, a second surface, and a through vent that is divided into a first partial hole and a second partial hole. The first partial hole extends from the first surface to the second partial hole, and the second partial hole extends from the second surface to the first partial hole. The guiding metal layer is formed on the second surface and in the second partial hole, and covers the sidewall of the second partial hole. The guiding metal layer extends from the second partial hole to the second surface, and does not cover the sidewall of the first partial hole and the first surface. The sealing material seals the second partial hole.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: August 28, 2018
    Assignee: UNISTARS CORPORATION
    Inventors: Hsin-Hsien Hsieh, Shang-Yi Wu
  • Patent number: 9209371
    Abstract: A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 8, 2015
    Assignee: Unistars
    Inventors: Tien-hao Huang, Shang-Yi Wu, Yi-chun Wu
  • Publication number: 20150226382
    Abstract: An electroluminescence device comprises a sandwich structure and a first luminous unit. The sandwich structure comprises a first metal layer, an insulation layer, and a second metal layer stacked in sequence along a stacking direction. The first luminous unit is disposed on a sidewall of the sandwich structure parallel to the stacking direction, wherein the first luminous unit comprises a first electrode and a second electrode connected to the first metal layer and the second metal layer by a solder ball respectively.
    Type: Application
    Filed: February 11, 2014
    Publication date: August 13, 2015
    Applicant: Unistars Corporation
    Inventors: Wen-Cheng CHIEN, Shang-Yi WU, Tien-Hao HUANG, Hsin-Hsien HSIEH
  • Patent number: 9059384
    Abstract: LED packaging construction includes a substrate, a cavernous construction, a LED, and a reflection layer. The substrate is daubed with an insulation layer and a circuit layer on a surface on the substrate, wherein the substrate is made of metal, and the insulation layer is disposed between the circuit layer and the substrate. The cavernous construction is disposed on the substrate and surrounds the LED, and is formed by disposing a photoresist layer and patterning the photoresist layer. The circuit layer electrically connects the LED through a conducting wire. The reflection layer is at least disposed on a first surface of the cavernous construction, wherein the first surface surrounds the LED and faces toward the LED, and a part of light emitted from the LED is reflected by the reflection layer.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: June 16, 2015
    Assignee: Unistars
    Inventors: Shin-Shien Shie, Tien-hao Huang, Shang-Yi Wu, Yi-chun Wu
  • Publication number: 20150060911
    Abstract: An optoelectronic semiconductor device comprises a substrate, at least one solid via plug, at least one optoelectronic semiconductor chip, a phosphor layer and a molding body. The at least one solid via plug penetrates through the substrate. The at least one optoelectronic semiconductor chip has a first electrode aligned to and electrically connected with the solid via plug. The phosphor layer covers at least one surface of the optoelectronic semiconductor chip. The molding body encapsulates the substrate, the optoelectronic semiconductor chip and the phosphor layer. The number of solid valid plugs, substrate surfaces, electrodes, bonding pad on each surface of the substrate for forming each optoelectronic semiconductor device can be, for example, two, respectively.
    Type: Application
    Filed: September 5, 2013
    Publication date: March 5, 2015
    Applicant: Unistars Corporation
    Inventors: Wen-Cheng CHIEN, Tien-Hao HUANG, Shang-Yi WU
  • Patent number: 8866268
    Abstract: A semiconductor package structure and a manufacturing method thereof are provided. The semiconductor package structure includes a semiconductor die, a thermally conductive film, a substrate, a plurality of electrically conductive film patterns, and at least one insulator. The thermally conductive film is disposed on the bottom of the semiconductor die. The substrate is substantially comprised of the electrically conductive material or semiconductor material. Furthermore, a first hole is disposed on and passed all the way through the substrate, and the semiconductor die is disposed in the first hole. The electrically conductive film patterns are disposed on the substrate, and not contacting with each other. In addition, the insulator is connected between the semiconductor die and the substrate.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: October 21, 2014
    Assignee: Unistars Corporation
    Inventors: Shang-Yi Wu, Wen-Cheng Chien, Chia-Lun Tsai, Tien-Hao Huang
  • Patent number: 8866313
    Abstract: A substrate includes a die-bonding zone and a glue spreading pattern. The die-bonding zone is set to bond a die. The glue spreading pattern is placed in the die-bonding zone and includes a containing space. The die is placed on the glue spreading pattern, an area of a bottom of the die is greater than an area of an opening of the glue spreading pattern, the containing room of the glue spreading pattern is filled with a glue, and the die is bonded to the substrate by means of the glue.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 21, 2014
    Assignee: Unistars Corporation
    Inventors: Tien-Hao Huang, Hsin-Hsie Lee, Yi-Chun Wu, Shang-Yi Wu
  • Publication number: 20140247585
    Abstract: A semiconductor lighting apparatus includes an illumination module and a power module. The illumination module includes a supporting member, a semiconductor light-emitting element, an electrode structure and a first connecting member. The semiconductor light-emitting element is mounted on the supporting member and electrically connected with the electrode structure. The first connecting member is mounted on a first side of the supporting member. The power module is configured to connect to the first side of the supporting member, and includes a second connecting member and a driving circuit member. The second connecting member is detachably connected with the first connecting member. The driving circuit member is electrically connected with the second connecting member and electrically connected with the electrode structure to provide a driving power to the semiconductor light-emitting element.
    Type: Application
    Filed: March 1, 2013
    Publication date: September 4, 2014
    Applicant: UNISTARS CORPORATION
    Inventors: Wen-Cheng CHIEN, Shang-Yi WU, Shin-Shien SHIE
  • Publication number: 20140191274
    Abstract: A substrate includes a die-bonding zone and a glue spreading pattern. The die-bonding zone is set to bond a die. The glue spreading pattern is placed in the die-bonding zone and includes a containing space. The die is placed on the glue spreading pattern, an area of a bottom of the die is greater than an area of an opening of the glue spreading pattern, the containing room of the glue spreading pattern is filled with a glue, and the die is bonded to the substrate by means of the glue.
    Type: Application
    Filed: March 13, 2013
    Publication date: July 10, 2014
    Applicant: Unistars Corporation
    Inventors: Tien-Hao Huang, Hsin-Hsie Lee, Yi-Chun Wu, Shang-Yi Wu
  • Publication number: 20140151741
    Abstract: A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 5, 2014
    Applicant: Unistars
    Inventors: Tien-hao Huang, Shang-Yi Wu, Yi-chun Wu
  • Publication number: 20140151730
    Abstract: LED packaging construction includes a substrate, a cavernous construction, a LED, and a reflection layer. The substrate is daubed with an insulation layer and a circuit layer on a surface on the substrate, wherein the substrate is made of metal, and the insulation layer is disposed between the circuit layer and the substrate. The cavernous construction is disposed on the substrate and surrounds the LED, and is formed by disposing a photoresist layer and patterning the photoresist layer. The circuit layer electrically connects the LED through a conducting wire. The reflection layer is at least disposed on a first surface of the cavernous construction, wherein the first surface surrounds the LED and faces toward the LED, and a part of light emitted from the LED is reflected by the reflection layer.
    Type: Application
    Filed: March 15, 2013
    Publication date: June 5, 2014
    Applicant: Unistars
    Inventors: Shin-Shien Shie, Tien-hao Huang, Shang-Yi Wu, Yi-chun Wu
  • Patent number: 8723214
    Abstract: A submount and a manufacturing method thereof are provided. The submount, on which at least a semiconductor die is disposed, is mounted on a circuit board. The submount includes a substrate made of a conductive material or a semiconducting material, a plurality of conductive film patterns, and an insulating film pattern. A surface of the substrate includes a die-bonding area and a plurality of conductive areas. The conductive film patterns are individually distributed in the respective conductive areas. The insulating film pattern is disposed between the conductive film pattern and the insulating film pattern, but is not disposed in the die-bonding area. Furthermore, the semiconductor die is disposed in the die-bonding area and is electrically connected with the conductive film patterns. Because the insulating film pattern is not being disposed in the die-bonding area of the submount, the submount structure has improved heat transfer efficiency.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: May 13, 2014
    Assignee: Unistars Corporation
    Inventors: Wen-Cheng Chien, Chia-Lun Tsai
  • Publication number: 20140045302
    Abstract: A submount and a manufacturing method thereof are provided. The submount, on which at least a semiconductor die is disposed, is mounted on a circuit board. The submount includes a substrate made of a conductive material or a semiconducting material, a plurality of conductive film patterns, and an insulating film pattern. A surface of the substrate includes a die-bonding area and a plurality of conductive areas. The conductive film patterns are individually distributed in the respective conductive areas. The insulating film pattern is disposed between the conductive film pattern and the insulating film pattern, but is not disposed in the die-bonding area. Furthermore, the semiconductor die is disposed in the die-bonding area and is electrically connected with the conductive film patterns. Because the insulating film pattern is not being disposed in the die-bonding area of the submount, the submount structure has improved heat transfer efficiency.
    Type: Application
    Filed: October 21, 2013
    Publication date: February 13, 2014
    Applicant: Unistars
    Inventors: Wen-Cheng Chien, Chia-Lun Tsai
  • Patent number: 8587001
    Abstract: An LED light module free of jumper wires has a substrate and multiple LED chips. The substrate has a positive side circuit, a negative side circuit, multiple first chip connection portions and multiple second connection portions. The first and second chip connection portions are respectively connected to the positive and negative side circuits, and are juxtaposedly and alternately arranged on the substrate so that a width between each first chip connection portion and a corresponding second chip connection portion is smaller than a width of each LED chip. Each LED chip can be directly mounted on corresponding first and second chip connection portions to electrically connect to the positive and negative side circuits. Accordingly, jumper wires for connecting the LED chips and the positive and negative side circuits can be removed to avoid broken jumper wires occurring when the LED light module is shipped or assembled.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: November 19, 2013
    Assignee: Unistar Opto Corporation
    Inventors: Chin-Lung Lin, Yen-Chang Tu, Pai-Ti Lin, Che-Chang Hu
  • Publication number: 20130207129
    Abstract: An LED area light module has a substrate and a circuit layer and a solder mask layer formed on the substrate. The solder mask layer partially covers the circuit layer for the partially exposed circuit layer to form multiple electrical contacts. An embankment wall is formed on the solder mask layer with a solder mask material for the electrical contacts to be located within the embankment wall. Multiple LED chips are mounted on the solder mask layer within the embankment wall and electrically connected to the electrical contacts. Optically-transmissive adhesive is filled and concentrated within the embankment wall and covers the LED chips by a tension force thereof, and forms an optically-transmissive adhesive layer after congealed. Accordingly, the LED area light module eliminates the use of thick frame made of metal or rubber and steps of manufacturing and mounting the frame to simplify the packaging processes.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: UNISTAR OPTO CORPORATION
    Inventors: Chin-Lung LIN, Yen-Chang TU, Pai-Ti LIN, Che-Chang HU
  • Patent number: 8251541
    Abstract: A tubeless light-emitting diode (LED) based lighting device includes at least one base, at least one LED lighting module, and at least one control circuit. The base includes a heat dissipation body. The LED lighting module is mounted to the base so that the base provides the LED lighting module with the functions of retention and heat dissipation. The control circuit is mounted to the base and is electrically connected to power wiring of the LED lighting module for ON/OFF switching of the LED lighting module and supplying of operation power. As such, a tubeless lighting device that emits light in a power saving manner and is constructed in a volume reduced manner is provided.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: August 28, 2012
    Assignee: Unistar Opto Corporation
    Inventor: Chin-Lung Lin