Abstract: An integrated circuit layout includes dense figures and at least one isolated figure. A plurality of dummy patterns are formed to surround the isolated figure, so as to reduce the difference in pattern density of the integrated circuit layout. A transmitted light of the dummy patterns provides a phase difference of 0 or 180 degrees relative to a transmitted light of the integrated circuit layout. The integrated circuit layout and the plurality of dummy patterns are formed on a photo-mask.

Abstract: A solder bump structure and laser repair process for memory device include forming a first dielectric layer on a bump pad of a semiconductor wafer. After that, the first dielectric layer is etched to form a contact hole and to expose portions of the bump pad. A second dielectric layer is then formed on a surface of the semiconductor wafer outside of the contact hole. An under bump metallurgy (UBM) process is performed to form a metal layer on a surface of the contact hole, and a solder bump is formed on the metal layer. Finally, the laser repair process for memory device is completed.

Abstract: The present invention provides a method of forming a capacitor in an integrated circuit. The method comprises providing a semiconductor substrate having a conductive layer thereon. The partial conductive layer is removed to form an electrode. A plurality of first dopants are implanted on a surface of the electrode to form a first doped region. Then a plurality of second dopants are implanted into the electrode to form a second doped region below the first doped region. Then the capacitor is formed comprising the electrode. The first doped region and the second region can reduce voltage coefficient as well as increase capacitance of the capacitor.