Patents Assigned to United Micoelectronics Corp.
  • Patent number: 6207579
    Abstract: A method of fabricating a self-aligned storage node is described. A storage node plug is formed after formations of the bit line contact and the storage node contact. A spacer is formed on a sidewall of an opening, which is used for forming a bit line. The bit line is formed in the opening. Because the spacer provides good isolation, the tolerance window for forming the bit line is increased. Some follow-up steps are performed to form a storage node.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: March 27, 2001
    Assignee: United Micoelectronics Corp.
    Inventor: Terry Chung-Yi Chen
  • Patent number: 6165857
    Abstract: A new improvement for selective epitaxial growth is disclosed. In one embodiment, the present invention provides a low power metal oxide semiconductor field effect transistor (MOSFET), which includes a substrate. Next, a gate oxide layer is formed on the substrate. Moreover, a polysilicon layer is deposited on the gate oxide layer. Patterning to etch the polysilicon layer and the gate oxide layer to define a gate. First ions are implanted into the substrate by using said gate as a hard mask. Sequentially, a liner oxide is covered over the entire exposed surface of the resulting structure. Moreover, a conformal first dielectric layer and second dielectric layer are deposited above the liner oxide in proper order. The second dielectric layer is etched back to form a dielectric spacer on sidewall of the first dielectric layer.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: December 26, 2000
    Assignee: United Micoelectronics Corp.
    Inventors: Wen-Kuan Yeh, Tony Lin, Jih-Wen Chou