Patents Assigned to United Microelectric Corp.
  • Patent number: 10643911
    Abstract: A scribe line structure including a semiconductor substrate, a pad and a first patterned metal layer is provided. The semiconductor substrate has a die region, a die sealing region located outside the die region and a dicing region located outside the die sealing region. The pad is disposed in the dicing region. The first patterned metal layer is disposed in the dicing region, right below and connected to the pad, wherein the first patterned metal layer has a plurality of first patterns directly connected to each other.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: May 5, 2020
    Assignee: UNITED MICROELECTRIC CORP.
    Inventor: Kuang-Hui Tang
  • Patent number: 9496182
    Abstract: A semiconductor device comprises a substrate, a semiconductor fin, a first isolation structure and a first dummy structure. The semiconductor fin comprises a first sub-fin and a second sub-fin protruding from a surface of the substrate. The first isolation structure is disposed in the semiconductor fin used for electrically isolating the first sub-fin and the second sub-fin. The first dummy structure is disposed on the first isolation structure and laterally extends beyond the first isolation structure along a long axis of the semiconductor fin, so as to partially overlap a portion of the first sub-fin and a portion of the second sub-fin.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: November 15, 2016
    Assignee: UNITED MICROELECTRIC CORP.
    Inventor: Yu-Cheng Tung
  • Patent number: 7638390
    Abstract: A static random access memory (SRAM) cell structure at least comprising a substrate, a transistor, an upper electrode and a capacitor dielectric layer. A device isolation structure is set up in the substrate to define an active region. The active region has an opening. The transistor is set up over the active region of the substrate. The source region of the transistor is next to the opening. The upper electrode is set up over the opening such that the opening is completely filled. The capacitor dielectric layer is set up between the upper electrode and the substrate.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: December 29, 2009
    Assignee: United Microelectric Corp.
    Inventors: Tzung-Han Lee, Kuang-Pi Lee, Wen-Jeng Lin, Rern-Hurng Larn
  • Patent number: 6989337
    Abstract: A silicon oxide gap-filling process is described, wherein a CVD process having an etching effect is performed to fill up a trench with silicon oxide. The reaction gases used in the CVD process include deposition gases and He/H2 mixed gas as a sputtering-etching gas, wherein the percentage of the He/H2 mixed gas in the total reaction gases is raised with the increase of the aspect ratio of the trench.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: January 24, 2006
    Assignee: United Microelectric Corp.
    Inventors: Hsiu-Chuan Chu, Chih-An Huang, Teng-Chun Tsai, Neng-Kuo Chen
  • Patent number: 6755726
    Abstract: A polishing head with a floating knife-edge mechanism includes a base, a retaining ring secured to the base defining a pocket area beneath the base, and a lower assembly floating within the pocket area via a diaphragm seal. The lower assembly includes a disk-shaped support plate having a plurality of apertures distributed in a center region of the support plate, a clamp ring used to secure the diaphragm seal along a rim region of the support plate, and the floating knife-edge mechanism positioned between the rim region and the center region of the support plate.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: June 29, 2004
    Assignee: United Microelectric Corp.
    Inventors: Tzu-Shin Chen, Ming-Hsing Kao, Chin-Kun Lin, Wen-Chin Lin