Abstract: An optical phased array is provided, including: a silicon substrate; a silicon oxide layer; an optical waveguide layer including a coupling beam splitter and a grating antenna; a silicon oxide cladding layer, disposed around the optical waveguide layer and filled in the band-shaped gap; and one or more lithium niobate phase shifters; each lithium niobate phase shifter includes: a lithium niobate thin film located in the band-shaped gap, a lithium niobate optical waveguide disposed over the lithium niobate thin film and connected to the coupling beam splitter and the grating antenna, modulation electrodes. The present disclosure uses materials with high electro-optical coefficient and low loss, such as lithium niobate, to replace thermal modulation resistors and the phase modulation mode based on carrier injection used in optical phased arrays, so that the optical phase modulation with low power consumption, high speed and low waveguide loss can be performed.

Abstract: The present disclosure provides a flexible integrated array sensor and manufacturing methods thereof. The array sensor includes a silicon wafer, a readout circuit layer, a sensing array layer, and a polymer substrate layer disposed on the silicon wafer. The manufacturing method includes: preparing a silicon wafer; fabricating a plurality of function arrays, each including m*n function units, on a surface of the silicon wafer; etching one or more deep grooves on the surface of the silicon wafer between the arrays; fabricating a thinning support; and thinning a bottom surface of the silicon wafer to a target thickness so that the arrays are separated from each other. The etching depth for etching the one or more deep grooves is equal to or greater than the thickness of the silicon wafer after thinning.

Abstract: A coupling alignment device and method for a laser chip and a silicon-based optoelectronic chip are disclosed. The device comprises a transfer mold which includes a substrate, first protrusions, and second protrusions. The first protrusions are provided with through holes and are used for being clamped into first recesses in the laser chip; and the second protrusions are used for being clamped into second recesses in the silicon-based optoelectronic chip. The coupling alignment is achieved by etching the first recesses in the laser chip, etching the second recesses in the silicon-based optoelectronic chip, etching the first protrusions, the second protrusions, and the through holes in the transfer mold. A flip-chip suction nozzle is connected with the transfer mold, which is in alignment with the laser chip, and picks up the laser chip by means of the through holes.

Abstract: A programmable optical chip and a terminal is provided, wherein the optical chip includes: one or more first transmission paths for transmitting an optical signal in the programmable optical chip; first programmable basic devices arranged in an array; and optical IP cores, wherein the optical IP cores and the first programmable basic devices are optically coupled, and the optical IP cores are optically coupled. The optical IP cores include optical soft cores and/or optical firm cores. Each type of optical soft core includes second programmable basic devices and one or more second transmission paths for transmitting the optical signal in the optical soft core. Each type of optical firm core includes third programmable basic devices, one or more third transmission paths for transmitting the optical signal in the optical firm core, and first optical devices used to process the optical signal.

Abstract: An edge coupler and a fabrication method therefor are provided. The method includes: providing a semiconductor-on-insulator substrate, the semiconductor-on-insulator substrate including a first substrate, an insulating layer on the first substrate, and a semiconductor layer on the insulating layer; patterning the semiconductor layer to form a first waveguide; forming a first dielectric layer on the insulating layer; forming a second dielectric layer on the first dielectric layer and the first waveguide; forming a second waveguide on the second dielectric layer; forming a third dielectric layer covering the second waveguide; bonding the third dielectric layer to a carrier substrate on a side of the third dielectric layer away from the second waveguide; removing the first substrate; and forming a fourth dielectric layer on a surface of the insulating layer.

Abstract: A silicon photonic chip-based LiDAR, comprising a silicon photonic chip (2), a laser module, a beam collimator module (4), and a signal processing module (6), where the laser outputs a frequency modulated continuous laser and transmits the frequency modulated continuous laser to the silicon photonic chip (2), where the laser is split and transmitted in the silicon photonic chip (2) to form a reference interference light and a local oscillation light on the one hand, and the split laser is transmitted to the target (5) via the beam collimator module (4), and then the reflect light of the reference interference light is received to interfere with the local oscillation light to form a measurement interference light on the other hand; and the reference interference light and the measurement interference light are photoelectrically detected in the silicon photonic chip (2) and form an electrical signal being output to the signal processing module (6) to obtain the distance and speed of the target.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes: providing a semiconductor-on-insulator substrate including a first substrate, a first insulating layer on the first substrate, and a semiconductor layer on the first insulating layer; patterning the semiconductor layer to form a grating coupler; forming one or more functional layer stacked with each other on a side of the semiconductor layer that faces away from the first insulating layer; bonding the one or more functional layer to a carrier substrate on a side of the one or more functional layer that faces away from the semiconductor layer; and completely removing the first substrate to provide, by the first insulating layer instead of the first substrate, an optical transmission channel between the grating coupler and an outside of the semiconductor device that is located on a side, facing away from the semiconductor layer, of the first insulating layer.

Abstract: A computing apparatus is provided. The apparatus includes: an input port to receive a first optical signal; a matrix calculation unit having a transmission matrix and configured to use the transmission matrix to process the first optical signal to obtain a second optical signal, where the second optical signal has a complex amplitude, and the transmission matrix is a unitary matrix M?; a real part obtaining unit optically coupled to the matrix calculation unit and configured to obtain, from the second optical signal, a third optical signal representing a real part of a complex amplitude of the second optical signal; and an output port configured to output an optical signal.

Abstract: A digital signal modulation method for a photon artificial intelligence computing chip, including: modulating one or more groups of digital electrical signals into optical signals; where the group of digital electrical signals comprises several timing signals being outputted in sequence in a channel within a fixed period; where each timing signal has the same base clock and signal time length; where each timing signal conveying N-bit digital information has 2N?1 base clocks, the number of the base clocks of a high-level signal or the number of a digital signal “1” in the timing signal is a signal value of the timing signal, and the signal value is equal to a value of the N-bit digital information being transmitted; and where the timing signal is a modulating signal for converting the electrical signal to the optical signal.

Abstract: The present disclosure provides an energy identification method for a micro-energy device based on back propagation (BP) neural network, which includes the following steps: S1, sampling a dynamic voltage of a micro-energy device in an open-circuit state to obtain an original voltage signal, and denoising the original voltage signal by an adaptive threshold wavelet transform; S2, extracting an R wave peak value of the denoised voltage signal so as to obtain model input data; S3, establishing a BP neural network model, inputting data to train the model, and stopping training when a training error is smaller than a preset value, to obtain a qualified BP neural network model; and S4, identifying a to-be-identified voltage signal by using the BP neural network model obtained in the step S3. According to the present disclosure, accurate and rapid energy identification and classification can be carried out, and the classification result is reliable.

Abstract: The present disclosure provides a flexible integrated array sensor and manufacturing methods thereof. The array sensor includes a silicon wafer, a readout circuit layer, a sensing array layer, and a polymer substrate layer disposed on the silicon wafer. The manufacturing method includes: preparing a silicon wafer; fabricating a plurality of function arrays, each including m*n function units, on a surface of the silicon wafer; etching one or more deep grooves on the surface of the silicon wafer between the arrays; fabricating a thinning support; and thinning a bottom surface of the silicon wafer to a target thickness so that the arrays are separated from each other. The etching depth for etching the one or more deep grooves is equal to or greater than the thickness of the silicon wafer after thinning.