Abstract: A method for fabricating a metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a first transistor region and a second transistor region; forming a first metal-oxide semiconductor (MOS) transistor on the first transistor region and a second MOS transistor on the second transistor region, in which the first MOS transistor includes a first dummy gate and the second MOS transistor comprises a second dummy gate; forming a patterned hard mask on the second MOS transistor, in which the hard mask includes at least one metal atom; and using the patterned hard mask to remove the first dummy gate of the first MOS transistor.

Abstract: The thickness of a capacitor dielectric layer is reduced by a manufacturing method. A first polysilicon layer is deposited on a substrate that has an isolation structure. Subsequently, nitrogen ions are implanted into the first polysilicon layer. The thickness of an oxide layer formed on the first polysilicon layer is determined by dosage of the implanted nitrogen ions. Next, the first polysilicon layer is patterned, so as to form a bottom electrode of the capacitor and expose a portion of the substrate. A thermal oxidation process is then performed to form an oxide layer, which is used as a gate oxide layer on the substrate and is also used as a dielectric layer in capacitor on the bottom electrode. Subsequently, a second polysilicon layer is deposited and patterned as an upper electrode of the capacitor on the capacitor dielectric layer.