Patents Assigned to University of Electronics Science and Technology
  • Patent number: 11629102
    Abstract: A Li3Mg2SbO6-based microwave dielectric ceramic material easy to sinter and with high Q value, and a preparation method thereof are disclosed. A chemical formula of the material is Li3(Mg1-xZnx)2SbO6, wherein 0.02?x?0.08. The preparation method includes: 1) mixing and ball-milling Sb2O3 and Li2CO3 according to a chemical ratio and then drying, and conducting pre-sintering to obtain a Li3SbO4 phase; and 2) mixing and ball-milling MgO, ZnO and Li3SbO4 powder according a chemical ratio of Li3(Mg1-xZnx)2SbO6 and then drying, conducting granulation and sieving after adding an adhesive, pressing into a cylindrical body, and sintering the cylindrical body into ceramic in the air at 1325° C. and under normal pressure, wherein a dielectric constant is 7.2-8.5, a quality factor is 51844-97719 GHz, and a temperature coefficient of resonance frequency is ?14-1 ppm/° C.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: April 18, 2023
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Cheng Liu, Hongyang Zhang, Qinghui Yang, Lichuan Jin, Yuanxun Li, Huaiwu Zhang
  • Publication number: 20230111342
    Abstract: A copper nanocatalyst, a method for preparing the copper nanocatalyst, and an application of the copper nanocatalyst in the synthesis of acetate or ammonia are provided. The copper nanocatalyst includes a substrate and an active agent loaded on the substrate. The method includes: preparing a cleaning agent by using an ethanol and a deionized; immersing the active agent in the cleaning agent, ultrasonically cleaning for 5-10 min at a frequency of 4×104 Hz-8×104 Hz, and drying for later use; mixing the cleaned active agent and a conductive binder according to a mass ratio of 1:19-9:1 of the active agent to the conductive binder, adding the ethanol, and fully stirring and dispersing to obtain a slurry; coating the slurry on a surface of the carbon paper, and drying the carbon paper by blowing through nitrogen flow to obtain the catalyst.
    Type: Application
    Filed: December 13, 2022
    Publication date: April 13, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Yijin KANG, Xianbiao FU
  • Patent number: 11620449
    Abstract: A method for machine reading comprehension includes: S1, obtaining a character-level indication vector of a question and a character-level indication vector of an article; S2, obtaining an encoded question vector and an encoded article vector; S3, obtaining an output P1 of a bidirectional attention model and an output P2 of a shared attention model; S4, obtaining an aggregated vector P3; S5, obtaining a text encoding vector P4; S6, obtaining global interaction information between words within the article; S7, obtaining a text vector P5 after using the self-attention model; S8, obtaining aggregated data P6 according to the text encoding vector P4 and the text vector P5; S9, obtaining a context vector of the article according to the aggregated data P6 and an unencoded article vector P; and S10, predicting an answer position according to the context vector of the article and the encoded question vector to complete the machine reading comprehension.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: April 4, 2023
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Jianping Li, Xiaofeng Gu, Jian Hu, Ruinan Sun, Wenting Feng, Shunli Li, Sheng Jiang
  • Patent number: 11621349
    Abstract: A nano-wall integrated circuit structure with high integration density is disclosed, which relates to the fields of microelectronic technology and integrated circuits (IC). Based on the different device physical principles with MOSFETs in traditional ICs, the nano-wall integrated circuit unit structure (Nano-Wall FET, referred to as NWaFET) with high integration density can improve the integration of the IC, significantly shorten the channel length, improve the flexibility of the device channel width-to-length ratio adjustment, and save chip area.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: April 4, 2023
    Assignee: University of Electronic Science and Technology of China
    Inventors: Ping Li, Yongbo Liao, Xianghe Zeng, Yaosen Li, Ke Feng, Chenxi Peng, Zhaoxi Hu, Fan Lin, Xuanlin Xiong, Tao He
  • Publication number: 20230090883
    Abstract: A three-dimensional carrier stored trench IGBT and a manufacturing method thereof are provided. A P-type buried layer and a split gate electrode with equal potential to an emitter metal is introduced on the basis of the traditional carrier stored trench IGBT, which can effectively eliminate the influence of an N-type carrier stored layer on breakdown characteristics of the device through the charge compensation, and at the same time can reduce the on-state voltage drop and improve the trade-off relationship between the on-state voltage drop Vceon and the turn-off loss Eoff. The split gate electrodes is introduced in the Z-axis direction, so that the gate electrodes are distributed at intervals. Therefore, the channel density is reduced. The turning on of the parasitic PMOS has a potential-clamping effect on the NMOS channel, so that the saturation current can be reduced and a wider short-circuit safe operating area (SCSOA) can be obtained.
    Type: Application
    Filed: May 25, 2022
    Publication date: March 23, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Jinping ZHANG, Rongrong ZHU, Yuanyuan TU, Zehong LI, Bo ZHANG
  • Publication number: 20230088637
    Abstract: A split gate carrier stored trench bipolar transistor (CSTBT) with current clamping PMOS include a P-type buried layer and a split gate electrode with equal potential to an emitter metal on the basis of the traditional CSTBT, which effectively eliminates the influence of an N-type carrier stored layer on breakdown characteristics of the device through the charge compensation effect, and helps to improve the trade-off relationship between the on-state voltage drop and the turn-off loss. Moreover, the introduction of a parasitic PMOS structure can reduce the saturation current and improve short-circuit safe operating area of the device, reduce the Miller capacitance, and improve the switching speed of the device and reduce the switching loss of the device. In addition, the split gate CSTBT integrating the split gate electrode and gate electrode in the same trench can shorten the distance between PMOS and NMOS channels.
    Type: Application
    Filed: May 25, 2022
    Publication date: March 23, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Jinping ZHANG, Yuanyuan TU, Rongrong ZHU, Zehong LI, Bo ZHANG
  • Publication number: 20230062221
    Abstract: A dynamic network resource allocation method based on network slicing is provided. A historical resource demand dataset of an accessed network slice is inputted into a first neural network for training. Based on a trained first neural network and the historical resource demand of the accessed network slice, a resource demand prediction information corresponding to the accessed network slice in a first prediction time period is determined. Resources are pre-allocated to the accessed network slice based on the resource demand prediction information, and resources are allocated to the accessed network slice when the first prediction time period arrives. In this way, the service provider can reasonably allocate network resources for network slices without violating the SLA, thus avoiding the waste of network resources.
    Type: Application
    Filed: July 27, 2022
    Publication date: March 2, 2023
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Gang SUN, Qing LI, Yuhui WANG, Hongfang YU, Jian SUN, Jing REN
  • Publication number: 20230053369
    Abstract: An SOI lateral homogenization field high voltage power semiconductor device, and a manufacturing method and application thereof are provided. The device includes a type I conductive semiconductor substrate, a type II conductive drift region, a type I field clamped layer, type I and type II conductive well regions, the first dielectric oxide layer forming a field oxide layer, the second dielectric oxide layer forming a gate oxide layer, a type II conductive buried dielectric layer, a type II conductive source heavily doped region, a type II conductive drain heavily doped region. The first dielectric oxide layer and the floating field plate polysilicon electrodes form a vertical floating field plate distributed throughout the type II conductive drift region to form a vertical floating equipotential field plate array. When the device is in on-state, high doping concentration can be realized by the full-region depletion effect form the vertical field plate arrays.
    Type: Application
    Filed: May 16, 2022
    Publication date: February 23, 2023
    Applicant: University of Electronic Science and Technology of China
    Inventors: Wentong ZHANG, Ning TANG, Ke ZHANG, Nailong HE, Ming QIAO, Zhaoji LI, Bo ZHANG
  • Patent number: 11587250
    Abstract: The present invention provides a method for quantitatively identifying the defects of large-size composite material based on infrared image sequence, firstly obtaining the overlap area of an infrared splicing image, and dividing the infrared splicing image into three parts according to overlap area: overlap area, reference image area and registration image area, then extracting the defect areas from the infrared splicing image to obtain P defect areas, then obtaining the conversion coordinates of pixels of defect areas according to the three parts of the infrared splicing image, and further obtaining the transient thermal response curves of centroid coordinate and edge point coordinates, finding out the thermal diffusion points from the edge points of defect areas according to a created weight sequence and dynamic distance threshold ?ttr×dp_max, finally, based on the thermal diffusion points, the accurate identification of quantitative size of defects are completed.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: February 21, 2023
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Yuhua Cheng, Chun Yin, Xiao Yang, Kai Chen, Xuegang Huang, Gen Qiu, Yinze Wang
  • Publication number: 20230051210
    Abstract: Disclosed is an in-situ vacuum reaction system for dynamically detecting defects, which includes an electron paramagnetic resonance spectrometer, an in-situ vacuum reaction chamber, a gas supply unit, a vacuum unit, an illumination unit, a temperature control unit and a mixing bottle, the in-situ vacuum reaction chamber is arranged inside a detection cavity of the electron paramagnetic resonance spectrometer, the gas supply unit is connected to the mixing bottle through a pipeline, and the mixing bottle is connected to a gas inlet of the in-situ vacuum reaction chamber through a pipeline, the vacuum unit is connected to the gas inlet of the in-situ vacuum reaction chamber through a pipeline, the illumination unit is arranged corresponding to a detachable window of the electron paramagnetic resonance spectrometer, and the temperature control unit is connected to the electron paramagnetic resonance spectrometer through a pipeline.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 16, 2023
    Applicant: Yangtze Delta Region Institute (Huzhou), University of Electronic Science and Technology of China
    Inventors: Fan DONG, Ye HE, Qin REN, Yanjuan SUN, Jianping SHENG
  • Patent number: 11579474
    Abstract: Provided are a polarization imaging apparatus, a polarization imaging method, a controller and a computer readable storage medium. The polarization imaging apparatus includes an optical rotation device, a lens device, an image sensor, an image processor, and a controller which are sequentially arranged along a ray direction of incident light. The controller is configured to control the optical rotation device to be in a first optical rotation state or a second optical rotation state, control the lens device to be in an in-focus state or an out-of-focus state, and control the image sensor to collect light passing through the optical rotation device and the lens device to obtain multiple images. The image processor is configured to obtain polarized image information according to the multiple images.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: February 14, 2023
    Assignees: BOE Technology Group Co., Ltd., University of Electronic Science and Technology of China
    Inventors: Xiaoxi Chen, Junrui Zhang, Mao Ye, Xuehui Zhu, Zhidong Wang, Pengwei Li, Lijia Zhou
  • Publication number: 20230036698
    Abstract: A reverse blocking gallium nitride (GaN) high electron mobility transistor includes, sequentially stacked from bottom to top, a substrate, a nucleation layer, a buffer layer, a barrier layer, a dielectric layer. The buffer layer and the barrier layer form a heterojunction structure. The barrier layer is provided with at least two p-GaN structures. The barrier layer is provided with a source metal at one end and a drain metal at the other end, source metal forms ohmic contact and drain metal forms Schottky contact with AlGaN barrier, respectively. In forward conduction, the two-dimensional electron gas below the spaced p-GaN structure connected to the drain metal is conductive, and a turn-on voltage of the device is low. During reverse blocking, the two-dimensional electron gas at the spaced p-GaN structure is rapidly depleted under reverse bias, to form a depletion region, so that the blocking capability of the device is improved.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 2, 2023
    Applicants: University of Electronic Science and Technology of China, Institute of Electronic and Information Engineering of UESTC in Guangdong
    Inventors: Ruize SUN, Wanjun CHEN, Chao LIU, Pan LUO, Fangzhou WANG
  • Patent number: 11565830
    Abstract: A method for calculating an optimal wheel position control angle of passenger boarding bridge automatic docking system includes collecting ranging information of a sensor to rotate the bridgehead direction via a distance measuring sensor on both sides of the bridgehead of the passenger boarding bridge, making the bridgehead parallel to the aircraft fuselage; collecting information of an aircraft door by a camera at the bridge head of the passenger boarding bridge to obtain a center position D of the aircraft door; in an ideal docking situation, the aircraft door should appear at the bridge head position as D?; the position where D? is projected vertically onto the aircraft fuselage is D?, that is, the line segment DD? is the horizontal distance deviation between the current passenger boarding bridge and the aircraft door, the line segment D?D? is the distance between the current boarding bridge and the aircraft fuselage.
    Type: Grant
    Filed: February 7, 2021
    Date of Patent: January 31, 2023
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Run Ye, Bin Yan, Cheng Zhang, Xuemei He, Xiaojia Zhou
  • Patent number: 11562224
    Abstract: A 1D-CNN-based ((one-dimensional convolutional neural network)-based) distributed optical fiber sensing signal feature learning and classification method is provided, which solves a problem that an existing distributed optical fiber sensing system has poor adaptive ability to a complex and changing environment and consumes time and effort due to adoption of manually extracted distinguishable event features.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: January 24, 2023
    Assignee: University of Electronic Science and Technology of China
    Inventors: Huijuan Wu, Jiping Chen, Xiangrong Liu, Yao Xiao, Mengjiao Wang, Bo Tang, Mingru Yang, Haoyu Qiu, Yunjiang Rao
  • Publication number: 20220412919
    Abstract: The present invention provides a method for eddy current thermography defect reconstruction based on electrical impedance tomography, first, obtaining a thermal reference image of temperature change with time by acquiring a thermogram sequence S of the specimen in the process of heating and fitting a curve for pixels of each location of the thermogram sequence S, then, creating a current matrix and a magnetic potential matrix, and calculating the satisfied conductivity distribution through iterations, so as a reconstructed image is obtained, then taking the low conductivity area of the reconstructed image as the defect profile, thus the defect profile is identified and quantified.
    Type: Application
    Filed: August 29, 2022
    Publication date: December 29, 2022
    Applicant: University of Electronic Science and Technology of China
    Inventors: Libing BAI, Xu ZHANG, Chao REN, Yiping LIANG, Ruiheng ZHANG, Yong DUAN, Jinliang SHAO, Yali ZHENG, Yuhua CHENG
  • Patent number: 11519731
    Abstract: A pedestrian adaptive zero-velocity update point selection method based on a neural network, including the following steps: S1, collecting inertial navigation data of different pedestrians in different motion modes; S2, preprocessing the inertial navigation data collected in the step S1, labeling the preprocessed data, and obtaining a training data set, a validation data set, and a test data set according to the preprocessed data and a label corresponding to the preprocessed data; S3, inputting the training data set to a convolutional neural network for training, obtaining a pedestrian adaptive zero-velocity update point selection model based on the convolutional neural network, and using the validation data set to validate the pedestrian adaptive zero-velocity update point selection model; and S4, inputting the test data set into the pedestrian adaptive zero-velocity update point selection model based on the convolutional neural network, and obtaining a selection result of pedestrian zero-velocity update poi
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: December 6, 2022
    Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Zhuoling Xiao, Xinguo Yu, Yi He, Bo Yan
  • Patent number: 11523211
    Abstract: A method and device for generating synthetic vortex sound field (SVSF) with more mode number includes the following steps: (1) a transducer array composed of N transducer units is constructed, and each transducer unit emits a sound field to generate an initial sound field; (2) at the same time, the position of the transducer unit and the phase of the sound field emitted by each transducer unit are changed, and each change produces a sound field, and thus changings times produces of sound fields, wherein the way to change the position of the transducer unit is to rotate the transducer array as a whole; (3) the initial sound field is superimposed with s of sound fields generated in step (2), to obtain SVSF with more mode number. The method and device for generating vortex sound field (VSF) can be used for underwater communication or acoustic imaging.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: December 6, 2022
    Assignees: CHENGDU INSTITUTE OF BIOLOGY, CHINESE ACADEMY OF SCIENCES, UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Haibo Jiang, Xinyang He, Yubin Gong, Dan Tang, Yang Yang, Zijun Chen, Jiangnan Fu, Yuan Gao
  • Publication number: 20220385323
    Abstract: A wireless single-phase AC-to-AC conversion circuit based on a 2.4G microwave includes a receiving antenna unit, a RF switch unit, a positive voltage rectification unit, a negative voltage rectification unit and an AC synthesis unit. An output port of the receiving antenna unit is connected to the common input port of the RF switch unit. A first microwave output end of the RF switch unit and a second microwave output end of the RF switch unit are correspondingly connected to a microwave input end of the positive voltage rectification unit and a microwave input end of the negative voltage rectification unit, respectively. ADC output end of the positive voltage rectification unit and a DC output end of the negative voltage rectification unit are correspondingly connected to a positive voltage input port of the AC synthesis unit and a negative voltage input port of the AC synthesis unit, respectively.
    Type: Application
    Filed: December 21, 2021
    Publication date: December 1, 2022
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Xiaoning LI, Wei ZHOU, Zidong ZHANG, Xin FANG, Shijun SHEN, Dawei GONG, Dejie LI
  • Publication number: 20220373577
    Abstract: The present invention provides a system for data mapping and storing in digital three-dimensional oscilloscope, wherein the fixed coefficients, which are calculated according the parameters and settings of a digital oscilloscope, are stored into a fixed coefficient memory CO RAM, the fixed coefficients are outputted to N fractional operation units through N?1 D flip-flop delay units to multiply with the acquired data x(n) and then be accumulated, thus N fractional calculus results are obtained. In this way, N fractional calculus results can be obtained by performing L/N fractional calculus operations. N fractional calculus results are sent to a signal processing and display module, in which they are converted into a display data through a drawing thread, and the display data are sent to LCD for displaying, thus the fractional calculus operation and display of a input signal in a digital oscilloscope is realized.
    Type: Application
    Filed: November 1, 2021
    Publication date: November 24, 2022
    Applicant: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINA
    Inventors: Bo XU, Kai CHEN, Libing BAI, Lulu TIAN, Hang GENG, Yuhua CHENG, Songting ZOU, Jia ZHAO, Yanjun YAN, Xiaoyu HUANG
  • Publication number: 20220367712
    Abstract: A power semiconductor device includes a P-type substrate, an N-type well region, a P-type body region, a gate oxide layer, a polysilicon gate, a first oxide layer, a first N+ contact region, a first P+ contact region, drain metal, a first-type doped region, and a gate oxide layer. An end of the P-type body region is flush with or exceeds an end of the polysilicon gate, wherein Cgd of the power semiconductor device is reduced and a switching frequency of the power semiconductor device is increased. A polysilicon field plate connected with a source is introduced over a drift region that is not only shield an influence of the polysilicon gate on the drift region, thereby eliminating Cgd caused by overlapping of traditional polysilicon gate and drift region, but also enable the power semiconductor device to have strong robustness against an hot carrier effect.
    Type: Application
    Filed: July 5, 2021
    Publication date: November 17, 2022
    Applicant: University of Electronic Science and Technology of China
    Inventors: Ming QIAO, Liu YUAN, Zhao WANG, Wenliang LIU, Bo ZHANG