Patents Assigned to UPPER ELEC. CO., LTD.
  • Patent number: 11756841
    Abstract: Disclosed is a method for testing a semiconductor element. The method comprises forming at least one redistribution layer on a chip, utilizing the at least one redistribution layer to test an array of semiconductor elements on the chip, and removing the at least one redistribution layer from the chip, wherein the length of each semiconductor element is between 2-150 ?m and the width of each semiconductor element is between 2-150 ?m.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: September 12, 2023
    Assignee: UPPER ELEC. CO., LTD.
    Inventor: Shih Hung Lin