Abstract: The bearing is intended for incorporation in devices effecting linear motions along axles of round section. It comprises a monolithic prismatic cassette and ball chains, disposed inside continuous two-track grooves. These grooves are machined totally in the thickness of the cassette walls, and the non-working sectors of the ball chains are disposed close to the cassette edges and along said edges. The external surface of the cassette is enclosed by the internal surface of the sleeve which is of identical geometric shape. This design makes possible the increase of the number of ball chains disposed in one wall and, hence, of the load-carrying capacity of the bearing.

Abstract: The device consists of a series network of a rectifier and a choke connected in parallel with a gas-discharge vessel and a capacitor. Between an intermediate tap of the primary of the saturating transformer and the positive terminal of the recitifer a thyristor is connected so that its cathode is connected with the intermediate tap. The control circuit of the thyristor consist of connected with each other secondary of the saturating transformer, unit for control pulse shaping, whose input is connected with the output of a voltage sensor mounted across the gas-discharge vessel. Between the intermediate tap of the primary of the saturating transformer and the positive terminal of the rectifier a series circuit of a diode and a second choke is connected so that the anode of the diode is connected with the intermediate tap.

Abstract: A converter of the rate of flow of a fluid is disclosed with a measuring chamber having a smooth internal outer surface and a cylindrical casing, disposed in the base of the eternal casing of the converter. An inlet chamber of a damper is formed from the side of a flexible membrane in the converter. Between the cylindrical casing and the base of the external casing, a free (clear) annular space is provided. On the external wall of the first half of said chamber there is a hole, while on the external wall of the other half of said chamber there is a compensation hole disposed in front of the tangential inlet of the cylindrical measuring chamber. A turbine wheel, disposed inside the chamber, has flat rectangular blades. In the axial outlet of the cylindrical measuring chamber, a guiding element is disposed with bottom and top transverse bases having the shape of circular sectors.

Abstract: A hydraulic distributor in the body of which there is provided a central hole and supply, a discharge, a working, and bypass conduits, said conduits being connected to the central hole. In central hole there is disposed a plunger which is provided with central and end rings. Between the rings there are shaped profile necks and in one of the ends of the plungers there is provided a bypass groove. The working conduits are arranged perpendicularly to the central hole in the distributor body, and non-return valves are disposed in them. The spaces formed by the profile necks in the walls of the central hole are interconnected by an auxiliary conduit. In one embodiment of the distributor, the auxliary conduit is provided in the central ring of the plunger. In another embodiment of the distributor, the auxiliary conduit is provided in the body of the distributor.

Abstract: A multimicroprocessor system constructed of multimicroprocessor structures each including N-number of microprocessor units, a shared memory, an input/output unit and a register exchange circuit. The microprocessor units are uniform and include a microprocessor, a data memory, a parallel input-output interface, a sequential input/output circuit, a program memory and a bi-directional buffer. The buffer connects the internal data bus in the microprocessor unit to the shared instruction bus for the multimicroprocessor structure, and the enable inputs of the buffer are connected to the internal busses for circuit selection in the microprocessor unit by the microprocessor address lines.

Abstract: A class BC power amplifier having a symmetrical push-pull preamplifier and a pair of symmetrical branches coupled, respectively, to the outputs of said push-pull preamplifier. Each of said branches includes a first power stage, operating in class B, coupled to the output of said branch, a control stage coupled to the respective output of said push-pull preamplifier for controlling said first power stage, a second power stage, operating in class C, coupled to said first power stage, and a first comparative stage coupled between said control stage and said branch output for controlling said second power stage. Each branch of said power amplifier further comprises a third power stage, operating in class C, also coupled to said first power stage, and a second comparative stage coupled between said control stage and said branch output for controlling said third power stage.

Abstract: An arithmetic device having successive arithmetic registers connected in cascade, with buffer registers at each end of the cascade. An information exchange circuit bidirectionally connected to all the arithmetic registers for controlling information transfer therebetween such that the first register is connected to all of the other registers and every other register is also connected to a preceding and a succeeding register.

Abstract: A press and press method wherein an article is shaped by displacing a tool thereagainst in a plurality of time-spaced main strokes separated by intervals in which the energy for the main strokes is stored in a force-storing element such as a rod under tension and during these intervals, the tool continues to be advanced against the article by an auxiliary motor. The apparatus utilizes a lever pivotally connected to a support, to the force-storing element and to the tool. The main drive motor acts on this lever.

Abstract: A register circuit for processing information in accordance with a given instruction set or set of transformation comprises N registers each having an input and an output and provided in a sequence R.sub.1, R.sub.2, R.sub.3, . . . R.sub.N, each register having n digits where N and n are integers. The output of the first register R.sub.1 is connected to a first bus while its input is connected to a second bus. All of the other registers R.sub.2, R.sub.3, . . . R.sub.N have their inputs connected to the first bus and their outputs to the second bus by respective strobe circuits. The strobe circuits of each of the buses R.sub.3 . . . R.sub.N are connected to respective control inputs a.sub.3 . . . a.sub.N. Additional control inputs a.sub.1 and a.sub.2 are connected to an OR-gate whose output is applied to the input strobe circuit of register R.sub.2 while the input a.sub.2 is also applied directly to the output strobe circuit of register R.sub. 2.

Abstract: A stack memory device which comprises a memory stack of n-bit registers with gating circuiting controlled by code inverters to allow first in - first out, first in - last out, last in - first out and other selective transfers of data within the stack.