Abstract: A method for manufacturing a flash memory comprises forming a first dielectric layer on a semiconductor substrate as a tunneling dielectric and forming a first conductive layer on the first dielectric layer. Next step is to pattern the first dielectric layer, the first conductive layer and the substrate to form a trench in the substrate. An isolation is refilled into the trench, a portion of isolation is removed to a surface of the first conductive layer. A portion of the first conductive layer is removed, thereby forming a cavity between adjacent isolation. A second conductive layer is formed along a surface of the cavity and the isolation, next, a portion of the second conductive layer is removed to a surface of the isolation. Subsequently, a second dielectric layer is formed on a surface of the floating gate, a third conductive layer is formed on the second dielectric layer as a control gate.

Abstract: An improved structure and method for forming an integrated circuit guard ring which prevents contamination/moisture from diffusing through a fuse opening, in the insulating layer(s), to device areas, is described. A first insulating layer is formed over portions of the substrate. A gate insulating layer is formed surrounding the first insulating layer. The first ring surrounds a fuse area--including the area where the fuse will be cut by a laser or burned by a current. A first dielectric layer is formed over the substrate surface. A first passivation layer is then formed over the first insulating layer. A first opening is formed through the first passivation layer and first dielectric layer over the first ring. A fuse is formed over the first passivation layer over the fuse area and a second ring of water impervious material is formed on the first ring through the first opening. The first and second rings form a moisture impervious seal.