Abstract: A co-simulation design system that runs on a host computer system is described that includes a hardware simulator and a processor simulator coupled via a interface mechanism. The execution of a user program is simulated by executing an analyzed version of the user program on the host computer system. The analysis adds timing information to the user program so that the processor simulator provides accurate timing information whenever the processor simulator interacts with the hardware simulator.
Type:
Grant
Filed:
March 27, 2001
Date of Patent:
June 24, 2003
Assignee:
Vast Systems Technology, Inc.
Inventors:
Graham R. Hellestrand, Ricky L. K. Chan, Ming Chi Kam, James R. Torossian