Abstract: A digitally controlled bit synchronizer and method for converting a pulse code modulated input signal having a known IRIG code into a filtered NRZ-L formatted output signal in phase with a predetermined clock signal. The bit synchronizer and method utilize a four-pole filter element, peak detector and reset circuits for removing AC offset, a variable controlled oscillator for adjusting the phase of the clock, Miller, Bi-Phase, and NRZ decoders, and a microprocessor for digitally controlling their operation and interconnection.