Patents Assigned to Veeco Instruments, Inc.
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Publication number: 20240102166Abstract: A wafer carrier includes a base including a generally planar bottom surface and a top surface that includes a plurality of platforms extending above the top surface. The wafer carrier includes a thermal cover defining a plurality of pockets. The thermal cover is configured to be coupled to the base by at least one fastener and the plurality of pockets are arranged such that each pocket of the plurality of pockets is aligned with a corresponding platform of the plurality of the platforms when the thermal cover is supported by a plurality of first pedestals that extend from the top surface of the base. A plurality of second pedestals are located along the plurality of platforms for supporting the one or more wafers, wherein each platform includes at least one second pedestal that extends from a top surface of the platform for supporting one wafer.Type: ApplicationFiled: August 4, 2023Publication date: March 28, 2024Applicant: Veeco Instruments Inc.Inventors: Aniruddha Bagchi, Sandeep Krishnan, Eric Armour, Michael Chansky, Yuliy Rashkovsky, Andrew Hanser, Matthew Van Doren, William Wangard, III
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Patent number: 11466360Abstract: An improved cathodic arc source and method of DLC film deposition with a carbon containing directional-jet plasma flow produced inside of cylindrical graphite cavity with depth of the cavity approximately equal to the cathode diameter. The generated carbon plasma expands through the orifice into ambient vacuum resulting in plasma flow strong self-constriction. The method represents a repetitive process that includes two steps: the described above plasma generation/deposition step that alternates with a recovery step. This step provides periodical removal of excessive amount of carbon accumulated on the cavity wall by motion of the cathode rod inside of the cavity in direction of the orifice. The cathode rod protrudes above the orifice, and moves back to the initial cathode tip position. The said steps periodically can be reproduced until the film with target thickness is deposited.Type: GrantFiled: August 19, 2020Date of Patent: October 11, 2022Assignee: Veeco Instruments Inc.Inventors: Boris L. Druz, Viktor Kanarov, Yuriy N. Yevtukhov, Sandeep Kohli, Xingjie Fang
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Patent number: 11417551Abstract: High bandwidth time-and-space resolved phase transition microscopy systems configured to detect melt onset in a wafer being processed by laser annealing systems with ultra-short dwell times and spot size.Type: GrantFiled: June 30, 2020Date of Patent: August 16, 2022Assignee: Veeco Instruments Inc.Inventor: Matthew Earl Wallace Reed
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Patent number: 11415809Abstract: High-efficiency line-forming optical systems and methods that employ a serrated aperture are disclosed. The line-forming optical system includes a laser source, a beam conditioning optical system, a first aperture device, and a relay optical system that includes a second aperture device having the serrated aperture. The serrated aperture is defined by opposing serrated blades configured to reduce intensity variations in a line image formed at an image plane as compared to using an aperture having straight-edged blades.Type: GrantFiled: July 15, 2019Date of Patent: August 16, 2022Assignee: Veeco Instruments Inc.Inventor: Serguei Anikitchev
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Publication number: 20220243325Abstract: A self-centering split substrate carrier that supports a semiconductor substrate in a CVD system includes a first section configured to be centrally located in the split substrate carrier having a top surface with a recessed area for receiving a substrate for CVD processing and comprising a plurality of apertures positioned in an outer surface. A second section formed in a ring-shape having an inner surface configured to receive the first section and an outer surface configured to interface with an edge drive rotation mechanism that rotates the substrate carrier. The inner surface comprising a plurality of boss structures, wherein a respective one of the plurality of boss structures on the inner surface of the second section is configured to fit into a respective one of the plurality of apertures positioned in the outer surface of the first section, so as to improve alignment of the first and the second section of the self-centering split substrate carrier.Type: ApplicationFiled: April 11, 2022Publication date: August 4, 2022Applicant: Veeco Instruments, Inc.Inventors: Sandeep Krishnan, Alexander I. Gurary, Yuliy Rashkovsky, Robert Scott Maxwell IV, Aniruddha Bagchi
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Publication number: 20220068700Abstract: A substrate reactor with centering pin for epitaxial deposition includes a vacuum chamber and a tube configured to rotate in the vacuum chamber around a tube geometrical center axis. A substrate carrier forming a pocket dimensioned for holding a substrate on a top surface includes an aperture that is centrally located on a bottom surface. The substrate carrier is positioned on and in contact with a top surface of the tube. A centering pin is positioned along a geometrical center axis of rotation of the substrate carrier. The centering pin has a first end positioned in the aperture on the bottom surface of the substrate carrier and a second end fixed inside the reactor so that the substrate carrier rotates around the geometrical center axis of the substrate carrier independent of the geometrical center axis of the tube.Type: ApplicationFiled: August 27, 2021Publication date: March 3, 2022Applicant: Veeco Instruments, Inc.Inventors: Alexander Gurary, Sandeep Krishnan, Aniruddha Bagchi, Yuliy Rashkovsky, Siddharth Patel
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Patent number: 11248295Abstract: A wafer carrier for use in a chemical vapor deposition (CVD) system includes a plurality of wafer retention pockets, each having a peripheral wall surface surrounding a floor surface and defining a periphery of that wafer retention pocket. Each wafer retention pocket has a periphery with a shape defined by at least a first arc having a first radius of curvature situated around a first arc center and a second arc having a second radius of curvature situated around a second arc center. The second arc is different from the first arc, either by its radius of curvature, arc center, or both.Type: GrantFiled: November 30, 2018Date of Patent: February 15, 2022Assignee: Veeco Instruments Inc.Inventors: Sandeep Krishnan, Lukas Urban
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Patent number: 10985046Abstract: Transfer methods disclosed herein include transferring micro-LEDs from a first carrier to a second carrier. The methods include bonding the micro-LEDs to the first carrier using a first releasable bonding layer that releases when exposed to actinic light. The micro-LEDs are then secured to a second carrier. The first bonding layer is then irradiated through the first releasable bonding layer through the first carrier with the actinic light to release the micro-LEDs from the first carrier. The second carrier can be a display backplane having bonding pads and the micro-LEDs can be secured to the bonding pads.Type: GrantFiled: July 24, 2019Date of Patent: April 20, 2021Assignee: Veeco Instruments Inc.Inventors: Ajit P. Paranjpe, Christopher J. Morath
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Publication number: 20210095374Abstract: A self-centering substrate carrier system for a chemical vapor deposition reactor includes a substrate carrier chosen to at least partially support a wafer for CVD processing and that comprises a beveled surface. A rotating tube comprising a beveled surface that matches the beveled surface of the substrate carrier, where a shape and dimensions of a cross section of the substrate carrier are chosen such that a center of mass of the substrate carrier is positioned a distance that is below a plane of contact defined by where a rim of substrate carrier contacts a rim of the rotating tube.Type: ApplicationFiled: May 6, 2020Publication date: April 1, 2021Applicant: Veeco Instruments, Inc.Inventors: Sandeep Krishnan, Bojan Mitrovic, Mandar Deshpande, Alexander Gurary, Aniruddha Bagchi
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Patent number: 10844488Abstract: A chuck system for performing a substrate-biased atomic layer deposition process that forms an electrically conductive film on a substrate includes an electrically conductive substrate holder configured to support the substrate and an electrically conductive base that supports the substrate holder. An electrical isolating layer is sandwiched between the substrate holder and the base. The electrical isolating layer has an outer end and an edge recess formed in and that runs around the outer edge. The edge recess is configured to prevent the electrically conductive film from coating the entire interior of the edge recess, thereby maintaining electrical isolation between the substrate holder and the base.Type: GrantFiled: January 23, 2018Date of Patent: November 24, 2020Assignee: Veeco Instruments Inc.Inventors: Michael J. Sershen, Adam Bertuch
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Patent number: 10847381Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.Type: GrantFiled: August 21, 2018Date of Patent: November 24, 2020Assignee: Veeco Instruments Inc.Inventors: Andrew M. Hawryluk, Serguei Anikitchev
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Publication number: 20200248307Abstract: A substrate carrier that supports a semiconductor substrate in a chemical vapor deposition system that includes a support having a beveled inner top surface including a top surface and a bottom surface. The top surface has a recessed area for receiving at least one substrate for chemical vapor deposition processing. The bottom surface has a beveled edge that forms a conical interface with the beveled inner top surface of the support at a self-locking angle that prevents substrate carrier movement in a vertical direction at a predetermined temperature equal to a maximum operation temperature. A coefficient of thermal expansion of a material forming the substrate carrier is substantially the same as a coefficient of thermal expansion of a material forming the support.Type: ApplicationFiled: January 26, 2020Publication date: August 6, 2020Applicant: Veeco Instruments, Inc.Inventors: Alexander I. Gurary, Sandeep Krishnan, Yuliy Rashkovsky, Todd Luse, Gaurab Samanta
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Patent number: 10718052Abstract: A rotating disk reactor for chemical vapor deposition includes a vacuum chamber and a ferrofluid feedthrough comprising an upper and a lower ferrofluid seal that passes a motor shaft into the vacuum chamber. A motor is coupled to the motor shaft and is positioned in an atmospheric region between the upper and the lower ferrofluid seal. A turntable is positioned in the vacuum chamber and is coupled to the motor shaft so that the motor rotates the turntable at a desired rotation rate. A dielectric support is coupled to the turntable so that the turntable rotates the dielectric support when driven by the shaft. A substrate carrier is positioned on the dielectric support in the vacuum chamber for chemical vapor deposition processing. A heater is positioned proximate to the substrate carrier that controls the temperature of the substrate carrier to a desired temperature for chemical vapor deposition.Type: GrantFiled: December 16, 2016Date of Patent: July 21, 2020Assignee: Veeco Instruments, Inc.Inventors: Louise S. Barriss, Richard A. Comunale, Roger P. Fremgen, Alexander I. Gurary, Todd A. Luse, Robert White Milgate, John D. Pollock
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Patent number: 10676826Abstract: Methods of forming 2D metal chalcogenide films using laser-assisted atomic layer deposition are disclosed. A direct-growth method includes: adhering a layer of metal-bearing molecules to the surface of a heated substrate; then reacting the layer of metal-bearing molecules with a chalcogenide-bearing radicalized precursor gas delivered using a plasma to form an amorphous 2D film of the metal chalcogenide; then laser annealing the amorphous 2D film to form a crystalline 2D film of the metal chalcogenide, which can have the form MX or MX2, where M is a metal and X is the chalcogenide. An indirect growth method that includes forming an MO3 film is also disclosed.Type: GrantFiled: March 29, 2018Date of Patent: June 9, 2020Assignee: Veeco Instruments Inc.Inventor: Ganesh Sundaram
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Patent number: 10665504Abstract: Methods disclosed herein include scanning a focus spot formed by a laser beam over either a metal layer or IC structures that include a metal and a non-metal. The focus spot is scanned over a scan path that includes scan path segments that partially overlap. The focus spot has an irradiance and a dwell time selected to locally melt the metal layer or locally melt the metal of the IC structures without melting the non-metal. This results in rapid melting and recrystallization of the metal, which decreases the resistivity of the metal and results in improved performance of the IC chips being fabricated. Also disclosed is an example laser melt system for carrying out methods disclosed herein is also disclosed.Type: GrantFiled: July 17, 2018Date of Patent: May 26, 2020Assignee: Veeco Instruments Inc.Inventors: Serguei Anikitchev, Andrew M. Hawryluk
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Patent number: 10571430Abstract: A chemical vapor deposition or atomic layer deposition system includes a gas concentration sensor for determining the quantity of precursor gases admitted thereto. The gas concentration sensor can include a transmitter and a receiver for transmitting an acoustic signal across a chamber. In embodiments, the transmitter and receiver are designed to increase transmitted signal while reducing transmitted noise, facilitating use of the gas concentration sensor at low pressure and high temperature.Type: GrantFiled: March 10, 2017Date of Patent: February 25, 2020Assignee: Veeco Instruments Inc.Inventors: Chi-Jung Cheng, Leo Chin, Christopher J. Morath, Arindam Sinharoy, Raymond C. Logue
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Patent number: 10570510Abstract: An arrangement of two shutters radially outward from an injector block and a susceptor onto which a wafer carrier is removably mounted are configured to provide a flowpath through a reactor chamber that does not exhibit a vortex, thereby reducing or eliminating buildup on the inside of the reactor chamber and facilitating large temperature gradient between the injector block and the wafer carrier. This can be accomplished by introduction of a purge gas flow at a radially inner wall of an upper shutter, and in some embodiments the purge gas can have a different chemical composition than the precursor gas used to grow desired epitaxial structures on the wafer carrier.Type: GrantFiled: March 2, 2017Date of Patent: February 25, 2020Assignee: Veeco Instruments Inc.Inventors: Bojan Mitrovic, Eric Armour, Ian Kunsch
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Patent number: D893088Type: GrantFiled: July 13, 2018Date of Patent: August 11, 2020Assignee: Veeco Instruments Inc.Inventors: Premkumar Suhandira Viran, Hao Chen, Joe Lamb
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Patent number: D908102Type: GrantFiled: February 20, 2019Date of Patent: January 19, 2021Assignee: Veeco Instruments Inc.Inventors: Michael W. Pacier, Michael J. Sershen, Adam F. Bertuch, Laurent Lecordier
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Patent number: D908103Type: GrantFiled: February 20, 2019Date of Patent: January 19, 2021Assignee: Veeco Instruments Inc.Inventors: Michael W. Pacier, Michael J. Sershen, Adam F. Bertuch, Laurent Lecordier