Patents Assigned to Velie Circuits, Inc.
  • Patent number: 5679155
    Abstract: A method and apparatus for depositing solder on the terminal pads (10) of printed circuit boards (12) in which a solder resist layer (16) or layers (16, 17) having a thickness corresponding to the desired solder height border the pads. Molten solder from a reservoir (58) is directed by nozzles (72) against the sides of the board (12) to fill the cavities extending above the terminal pads while the board (12) is moving via a conveyor mechanism relative to the reservoir (58). The cavities when filled with molten solder are covered by a suitable element such as a flexible belt (52) or roller. The molten solder within the covered cavities is then cooled below its solidification point and the covering element removed. If desired, part or all of the solder resist layer (16) or layers (16, 17) may then be stripped from the board (12) to leave solder pads extending above the surface of the board (12).
    Type: Grant
    Filed: May 18, 1995
    Date of Patent: October 21, 1997
    Assignee: Velie Circuits, Inc.
    Inventor: Larry N. Velie
  • Patent number: 5480483
    Abstract: An apparatus for depositing solder on the terminal pads of printed circuit boards in which a solder resist layer or layers having a thickness corresponding to the desired solder height border the pads. Molten solder from a reservoir is directed by nozzles against the sides of the board to fill the cavities extending above the terminal pads while the board is moving via a conveyor mechanism relative to the reservoir. The cavities when filled with molten solder are covered by a suitable element such as a flexible belt or roller. The molten solder within the covered cavities is then cooled below its solidification point and the covering element removed. If desired, part or all of the solder resist layer or layers may then be stripped from the board to leave solder pads extending above the surface of the board.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: January 2, 1996
    Assignee: Velie Circuits, Inc.
    Inventor: Larry N. Velie
  • Patent number: 5246731
    Abstract: A method and apparatus for depositing solder on the terminal pads of printed circuit boards in which a solder resist layer or layers having a thickness corresponding to the desired solder height border the pads. Molten solder from a reservoir is directed by nozzles against the sides of the board to fill the cavities extending above the terminal pads while the board is moving via a conveyor mechanism relative to the reservoir. The cavities when filled with molten solder are covered by a suitable element such as a flexible belt or roller. The molten solder within the covered cavities is then cooled below its solidification point and the covering element removed. If desired, part or all of the solder resist layer or layers may then be stripped from the board to leave solder pads extending above the surface of the board.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: September 21, 1993
    Assignee: Velie Circuits, Inc.
    Inventor: Larry N. Velie
  • Patent number: 4875982
    Abstract: A novel product and product by process is disclosed. The product is a uniform electrically-conductive coating on an insulative substrate, which coating is formed onto a printed circuit substrate having high aspect ratio holes (with an aspect ratio of 6:1 or higher) therein.Planting of high aspect ration holes is accomplished by offset longitudinally spaced-apart manifolds submerged in an electrolyte bath together with the printed circuit substrate moving back and forth in the space between the manifolds. A pump in a closed circulation system creates a vacuum in each manifold. The manifold portions adjacent to the printed circuit substrate include slots in a smooth curved front nose of the manifold to cause the electrolyte to be moved through the holes and in a sweeping vortex movement across the board's surface nearest to the manifold slots.
    Type: Grant
    Filed: February 6, 1987
    Date of Patent: October 24, 1989
    Assignee: Velie Circuits, Inc.
    Inventor: Larry N. Velie