Patents Assigned to Verayo, Inc.
  • Publication number: 20100127822
    Abstract: An integrated circuit includes a sequence generator configured to generate a series of challenges; a hidden output generator configured to generate a series of hidden outputs, each hidden output a function of a corresponding challenge in the series of challenges; and bit reduction circuitry configured to generate a response sequence including a plurality of response parts, each response part a function of a corresponding plurality of hidden outputs.
    Type: Application
    Filed: November 20, 2009
    Publication date: May 27, 2010
    Applicant: Verayo, Inc.
    Inventor: Srinivas Devadas
  • Patent number: 7702927
    Abstract: A field configurable device, such as an FPGA, supports secure field configuration without using non-volatile storage for cryptographic keys on the device and without requiring a continuous or ongoing power source to maintain a volatile storage on the device. The approach can be used to secure the configuration data such that it can in general be used on a single or a selected set of devices and/or encryption of the configuration data so that the encrypted configuration data can be exposed without compromising information encoded in the configuration data.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: April 20, 2010
    Assignee: Verayo, Inc.
    Inventors: Srinivas Devadas, Thomas J. Ziola
  • Publication number: 20090254981
    Abstract: A key is determined from a volatile response using circuitry on the device. The volatile response depend on process variation in fabrication of the device. Error control data that depends on the first volatile response can be computed, stored externally to the device, and then used to generate the key using a volatile response using the circuit. Applications of volatile keys include authentication and rights management for content and software.
    Type: Application
    Filed: June 16, 2009
    Publication date: October 8, 2009
    Applicant: Verayo, Inc.
    Inventors: Srinivas Devadas, Thomas Ziola
  • Patent number: 7564345
    Abstract: A key is determined from a volatile response using circuitry on the device. The volatile response depend on process variation in fabrication of the device. Error control data that depends on the first volatile response can be computed, stored externally to the device, and then used to generate the key using a volatile response using the circuit. Applications of volatile keys include authentication and rights management for content and software.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: July 21, 2009
    Assignee: Verayo, Inc.
    Inventors: Srinivas Devadas, Thomas Ziola
  • Publication number: 20090083833
    Abstract: Physical Unclonable Functions (PUFs) for authentication can be implemented in a variety of electronic devices including FPGAs, RFIDs, and ASICs. In some implementations, challenge-response pairs corresponding to individual PUFs can be enrolled and used to determine authentication data, which may be managed in a database. Later when a target object with a PUF is intended to be authenticated a set (or subset) of challenges are applied to each PUF device to authenticate it and thus distinguish it from others. In some examples, authentication is achieved without requiring complex cryptography circuitry implemented on the device. Furthermore, an authentication station does not necessarily have to be in communication with an authority holding the authentication data when a particular device is to be authenticated.
    Type: Application
    Filed: September 19, 2008
    Publication date: March 26, 2009
    Applicant: Verayo, Inc.
    Inventors: Thomas Ziola, Zdenek Paral, Srinivas Devadas, Gookwon Edward Suh, Vivek Khandelwal