Patents Assigned to VerIC Systems LLC
  • Electrical short locator method
    Patent number: 8019561
    Abstract: A method for locating electrical shorts in layout designs by either systematically removing subcells in the layout hierarchy or, if the shorts are not found in any of the subcells, iteratively excluding portions of the top level layout from the electrical connectivity analysis and thereby locate the shorting polygons. Shorts existing both in subcells and the top level will be found by applying the method repeatedly until all shorts are located and eliminated.
    Type: Grant
    Filed: August 31, 2008
    Date of Patent: September 13, 2011
    Assignee: VerIC Systems LLC
    Inventor: Mikael Bo Lennart Sahrling