Patents Assigned to Versatilis LLC
  • Patent number: 9006931
    Abstract: Devices that include one or more functional semiconductor elements that are immersed in static electric fields (E-fields). In one embodiment, one or more electrets are placed proximate the one or more organic, inorganic, or hybrid semiconductor elements so that the static charge(s) of the electret(s) participate in creating the static E-field(s) that influences the semiconductor element(s). An externally applied electric field can be used, for example, to enhance charge-carrier mobility in the semiconductor element and/or to vary the width of the depletion region in the semiconductor material.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: April 14, 2015
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 8859310
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: October 14, 2014
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20130092975
    Abstract: Methods of fabricating optoelectronic devices, such as photovoltaic cells and light-emitting devices. In one embodiment, such a method includes providing a substrate, applying a monolayer of semiconductor particles to the substrate, and encasing the monolayer with one or more coatings so as to form an encased-particle layer. At some point during the method, the substrate is removed so as to expose the reverse side of the encased-particle layer and further processing is performed on the reverse side. When a device made using such a method has been completed and installed into an electrical circuit the semiconductor particles actively participate in the photoelectric effect or generation of light, depending on the type of device.
    Type: Application
    Filed: June 10, 2011
    Publication date: April 18, 2013
    Applicant: VERSATILIS LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20130056712
    Abstract: Devices that include one or more functional semiconductor elements that are immersed in static electric fields (E-fields). In one embodiment, one or more electrets are placed proximate the one or more organic, inorganic, or hybrid semiconductor elements so that the static charge(s) of the electret(s) participate in creating the static E-field(s) that influences the semiconductor element(s). An externally applied electric field can be used, for example, to enhance charge-carrier mobility in the semiconductor element and/or to vary the width of the depletion region in the semiconductor material.
    Type: Application
    Filed: December 1, 2010
    Publication date: March 7, 2013
    Applicant: VERSATILIS LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 7879678
    Abstract: Methods of enhancing the performance of a field-effect transistor (FET) by providing a percolating network of metallic islands to the inversion layer of the FET so as to effectively reduce the channel length of the FET. The metal islands can be provided in a number of ways, including Volmer-Weber metallic film growth, breaking apart continuous metallic film, patterning metallic coating, dispersing metallic particles in a semiconducting material, applying a layer of composite particles having metallic cores and semiconducting shells and co-sputtering metallic and semiconducting materials, among others. FETs made using disclosed methods have a novel channel structures that include metallic islands spaced apart by semiconducting material.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: February 1, 2011
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 7871912
    Abstract: Various methods for forming active electronic devices, such as field-effect transistors, and devices made using these methods are disclosed. Some of the methods include growing freestanding nano-, micro- and milli-scale semiconducting structures that are used for the active semiconducting channels of the active electronic devices. Others of the methods include forming strands of active electronic devices along a wire. Yet others of the methods utilize both of these concepts so that the active electronic devices on a particular strand include freestanding semiconducting structures.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: January 18, 2011
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 7687372
    Abstract: Various embodiments of fabricated crystalline-based structures for the electronics, optoelectronics and optics industries are disclosed. Each of these structures is created in part by cleaving a donee layer from a crystalline donor, such as a micaceous/lamellar mass comprising a plurality of lamelliform sheets separable from each other along relatively weak cleavage planes. Once cleaved, one or more of these lamelliform sheets become the donee layer. The donee layer may be used for a variety of purposes, including a crystalline layer for supporting heteroepitaxial growth of one or more semiconductor layers thereon, an insulating layer, a barrier layer, a planarizing layer and a platform for creating useful structures, among others.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: March 30, 2010
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Patent number: 7638416
    Abstract: Strands of active electronic devices (AEDs), such as FETs, are made by first completely or partially forming a plurality of the AEDs on a precursor substrate. Then, one or more elongate conductors (e.g., wires) are secured to ones of the AEDs so as to electrically connected the AEDs together. After securing the conductor(s) to corresponding respective ones of the AEDs, the connected ones of the AEDs and their respective conductor(s) is/are liberated as one or more composite members from the precursor substrate by removing material from the substrate. Each of the composite substrates is further processed as needed to complete an AED strand.
    Type: Grant
    Filed: June 18, 2007
    Date of Patent: December 29, 2009
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20090218605
    Abstract: Methods of enhancing the performance of a field-effect transistor (FET) by providing a percolating network of metallic islands to the inversion layer of the FET so as to effectively reduce the channel length of the FET. The metal islands can be provided in a number of ways, including Volmer-Weber metallic film growth, breaking apart continuous metallic film, patterning metallic coating, dispersing metallic particles in a semiconducting material, applying a layer of composite particles having metallic cores and semiconducting shells and co-sputtering metallic and semiconducting materials, among others. FETs made using disclosed methods have a novel channel structures that include metallic islands spaced apart by semiconducting material.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 3, 2009
    Applicant: VERSATILIS LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20080150025
    Abstract: Various methods for forming active electronic devices, such as field-effect transistors, and devices made using these methods are disclosed. Some of the methods include growing freestanding nano-, micro- and milli-scale semiconducting structures that are used for the active semiconducting channels of the active electronic devices. Others of the methods include forming strands of active electronic devices along a wire. Yet others of the methods utilize both of these concepts so that the active electronic devices on a particular strand include freestanding semiconducting structures.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 26, 2008
    Applicant: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20070278526
    Abstract: Strands of active electronic devices (AEDs), such as FETs, are made by first completely or partially forming a plurality of the AEDs on a precursor substrate. Then, one or more elongate conductors (e.g., wires) are secured to ones of the AEDs so as to electrically connected the AEDs together. After securing the conductor(s) to corresponding respective ones of the AEDs, the connected ones of the AEDs and their respective conductor(s) is/are liberated as one or more composite members from the precursor substrate by removing material from the substrate. Each of the composite substrates is further processed as needed to complete an AED strand.
    Type: Application
    Filed: June 18, 2007
    Publication date: December 6, 2007
    Applicant: VERSATILIS LLC
    Inventor: Ajaykumar Jain
  • Publication number: 20070254490
    Abstract: A circuitry sheet comprising an electronic device layer stack containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be made by an electronic/optoelectronic device manufacturing method that includes the steps of forming the device layer stack on a temporary substrate removing material from both sides of the device layer stack, and then attaching a permanent substrate to the device layer stack. The method uses one or more resist layers that may be activated simultaneously and independently to impart distinct circuit pattern images into each of a plurality of image levels within each resist layer, thereby obviating repetitive sequential exposure, registration and alignment steps.
    Type: Application
    Filed: July 11, 2007
    Publication date: November 1, 2007
    Applicant: VERSATILIS, LLC
    Inventor: Ajaykumar Jain
  • Publication number: 20070200110
    Abstract: Strands of active electronic devices (AEDs), such as field-effect transistors, are made by processing a semiconductor substrate so that it yields a number of elongate semiconductor members liberated from the starting substrate. The elongate semiconductor members are secured to wires or wire-like structures so as to form semiconductor-member-on-a-wire composites upon which the AEDs are formed using various deposition and etching techniques. The AED strands have many uses, including the creating of electronic components, including flexible, conformal, rigid and foldable electronics, such as displays and sensors.
    Type: Application
    Filed: May 4, 2007
    Publication date: August 30, 2007
    Applicant: VERSATILIS LLC
    Inventor: Ajaykumar Jain
  • Patent number: 7259106
    Abstract: A circuitry sheet (322) comprising an electronic device layer stack (304) containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be made by an electronic/optoelectronic device manufacturing method (200) that includes the steps of forming the device layer stack on a temporary substrate (300), removing material from both sides of the device layer stack, and then attaching a permanent substrate (348) to the device layer stack. The method uses one or more resist layers (600) that may be activated simultaneously and independently to impart distinct circuit pattern images (603, 608, 612) into each of a plurality of image levels (612, 616, 620) within each resist layer, thereby obviating repetitive sequential exposure, registration and alignment steps.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 21, 2007
    Assignee: Versatilis LLC
    Inventor: Ajaykumar R. Jain
  • Publication number: 20060246267
    Abstract: Various embodiments of fabricated crystalline-based structures for the electronics, optoelectronics and optics industries are disclosed. Each of these structures is created in part by cleaving a donee layer from a crystalline donor, such as a micaceous/lamellar mass comprising a plurality of lamelliform sheets separable from each other along relatively weak cleavage planes. Once cleaved, one or more of these lamelliform sheets become the donee layer. The donee layer may be used for a variety of purposes, including a crystalline layer for supporting heteroepitaxial growth of one or more semiconductor layers thereon, an insulating layer, a barrier layer, a planarizing layer and a platform for creating useful structures, among others.
    Type: Application
    Filed: April 7, 2006
    Publication date: November 2, 2006
    Applicant: Versatilis LLC
    Inventor: Ajaykumar Jain
  • Publication number: 20060063351
    Abstract: A circuitry sheet (322) comprising an electronic device layer stack (304) containing electronic devices, e.g., thin-film transistors, or portions thereof, formed by removing material from both sides of the device layer stack. The circuitry sheet may be made by an electronic/optoelectronic device manufacturing method (200) that includes the steps of forming the device layer stack on a temporary substrate (300), removing material from both sides of the device layer stack, and then attaching a permanent substrate (348) to the device layer stack. The method uses one or more resist layers (600) that may be activated simultaneously and independently to impart distinct circuit pattern images (603, 608, 612) into each of a plurality of image levels (612, 616, 620) within each resist layer, thereby obviating repetitive sequential exposure, registration and alignment steps.
    Type: Application
    Filed: September 9, 2005
    Publication date: March 23, 2006
    Applicant: Versatilis LLC
    Inventor: Ajaykumar Jain