Patents Assigned to VIA LABS, INC.
  • Publication number: 20250139049
    Abstract: A USB cable, an e-marker device, and a humidity detection method for a USB connector are provided. The USB cable includes a first USB connector, a second USB connector, and an e-marker device. The second USB connector is coupled to the first USB connector. The e-marker device is coupled to a CC pin and a target pin of the first USB connector. The e-marker device detects a parasitic electrochemical impedance between the target pin and ground during a test period. The e-marker device obtains humidity information of the first USB connector based on the parasitic electrochemical impedance.
    Type: Application
    Filed: August 1, 2024
    Publication date: May 1, 2025
    Applicant: VIA LABS, INC.
    Inventors: Tze-Shiang Wang, Hui-Neng Chang, Sheng-Hsien Yen, Nai-Chuan Hung
  • Patent number: 12284815
    Abstract: A multilayer-type on-chip inductor includes a first winding portion arranged in an inter-metal dielectric (IMD) layer, which includes first and second semi-circular stacking layers arranged from inside to outside and in concentricity. A second winding portion includes third and fourth semi-circular stacking layers arranged symmetrically with the first semi-circular stacking layer and the second semi-circular stacking layer, respectively, with respect to a symmetry axis. A conductive branch layer is disposed in an insulating redistribution layer over the IMD layer. The first, second, third, and fourth semi-circular stacking layers each include an uppermost trace layer and a next uppermost trace layer vertically stacked under the uppermost trace layer.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: April 22, 2025
    Assignee: VIA LABS, INC.
    Inventor: Sheng-Yuan Lee
  • Patent number: 12197366
    Abstract: A USB IC, an operation method thereof, and a USB device are provided. The USB IC is disposed in the USB device and includes a sideband use interface circuit coupled to a sideband use pin of a USB connector of the USB device, and a control circuit. The control circuit is coupled to the sideband use interface circuit and reports a first adapter configuration to a USB host via the sideband use interface circuit so that the USB host enumerates the USB device. The control circuit observes a behavior of the USB host to the USB device after the USB device is enumerated. The control circuit determines whether the first adapter configuration is suitable for a connection manager of the USB host according to the behavior. If not, the control circuit reports a second adapter configuration to the USB host so that the USB host re-enumerates the USB device.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: January 14, 2025
    Assignee: VIA LABS, INC.
    Inventors: Chun-Heng Lin, Terrance Shiyang Shih, Chin-Sung Hsu
  • Publication number: 20240348219
    Abstract: A differential amplification device and a compensation method thereof. The differential amplification device includes a first terminal signal circuit, a second terminal signal circuit and a controller. The first terminal signal circuit and the second terminal signal circuit respectively generate a first terminal signal and a second terminal signal of a differential output signal to a first terminal of a transmission path. The controller adjusts first element parameters of the first terminal signal circuit or second element parameters of the second terminal signal circuit based on a transmitted differential signal at a second terminal of the transmission path to compensate for asymmetric influence by the transmission path on the first terminal signal and the second terminal signal of the transmitted differential signal. Adjustment of the first element parameter of the first terminal signal circuit is independent of adjustment of the second element parameter of the second terminal signal circuit.
    Type: Application
    Filed: March 14, 2024
    Publication date: October 17, 2024
    Applicant: VIA LABS, INC.
    Inventors: Hsiao-Chyi Lin, Yi-Shing Lin
  • Patent number: 12107043
    Abstract: A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer correspondingly formed below the first spiral trace layer, wherein the inter-metal dielectric layer has a separating region to divide the second spiral trace layer into a plurality of line segments, and wherein each of a plurality of first slit openings and each of a plurality of second slit openings pass through a corresponding line segment, and extend in an extending direction of a length of the corresponding line segment.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: October 1, 2024
    Assignee: VIA LABS, INC.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20240305290
    Abstract: A power delivery (PD) controller integrated circuit (IC) and a control method for a power switch are provided. A first terminal and a second terminal of the power switch are respectively coupled to a power pin of a universal serial bus (USB) connector and a power input terminal of a functional circuit. The PD controller IC generates a power switch control voltage to control the power switch. The PD controller IC may adjust a level of the power switch control voltage in stages during a power-on period of the functional circuit to gradually turn on the power switch.
    Type: Application
    Filed: June 6, 2023
    Publication date: September 12, 2024
    Applicant: VIA LABS, INC.
    Inventor: Jung-Chang Liu
  • Patent number: 12055963
    Abstract: A PD controller integrated circuit of a USB apparatus is disclosed, including a CC pad, a first switch, a second switch, a PD controller circuit, a high voltage sensing circuit, and a switch control circuit. The high voltage sensing circuit senses the CC pad. When a current voltage of the CC pad does not exceed a rated range, the first switch and the second switch connected in series between the CC pad and the PD controller circuit are turned on. When the current voltage exceeds the rated range, the first switch and the second switch are turned off, and the switch control circuit maintains a voltage of a common node between the first switch and the second switch at a reduced level lower than the current voltage.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: August 6, 2024
    Assignee: VIA LABS, INC.
    Inventor: Jung-Chang Liu
  • Publication number: 20240219458
    Abstract: An integrated circuit (IC), a testing system, and an operating method are provided. The IC includes a receiver circuit and a processing circuit. The receiver circuit processes a communication signal based on a setting threshold voltage and multiple current operating parameters. The processing circuit obtains at least one current parameter among the current operating parameters. When a host inquires the IC about a receiver margin for the communication signal, the processing circuit obtains eye height data corresponding to the current parameter from a parameter-to-eye height mapping relationship, and returns the receiver margin corresponding to the eye height data to the host. A testing device of the testing system calculates the eye height data based on a setting testing threshold voltage and a target parameter corresponding to a test signal, and generates the parameter-to-eye height mapping relationship based on the target parameter and the eye height data.
    Type: Application
    Filed: May 29, 2023
    Publication date: July 4, 2024
    Applicant: VIA LABS, INC.
    Inventors: Yi-Te Chen, Cheng Jun Yeh, Hsiao-Chyi Lin
  • Patent number: 12021367
    Abstract: A protection circuit applied in a hub chip including a power pin, a first data pin, and a second data pin is provided. A voltage generation circuit generates and adjusts output voltage according to the voltage of the power pin and the voltage of the first data pin. A PMOS transistor includes a first gate, a first electrode, a second electrode, and a first bulk. The first electrode is coupled to the power pin. The second electrode is coupled to the first data pin. The first bulk receives the output voltage. A detection circuit is coupled to the first gate and detects the voltage of the power pin. In response to the voltage of the power pin being equal to the first voltage, the detection circuit transmits the voltage of the first data pin to the first gate.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: June 25, 2024
    Assignee: VIA LABS, INC.
    Inventors: Hsiao Chyi Lin, Chia Ming Tu, Yi Shing Lin, Shao-Yu Chen
  • Patent number: 11914491
    Abstract: A USB integrated circuit (IC), a testing platform and an operating method for USB integrated circuit are provided. The USB integrated circuit includes a USB port physical layer (PHY) circuit, a first lane adapter, a second lane adapter, a routing circuit, and a USB transport layer circuit. The USB PHY circuit is configured to transmit a differential signal between the USB integrated circuit and an outside device. When the USB integrated circuit operates in a testing mode, the routing circuit electrically connects the first lane adapter to the USB PHY circuit. When the USB integrated circuit operates in a working mode, the routing circuit electrically connects the second lane adapter to the USB PHY circuit. The USB transport layer circuit is coupled to the first lane adapter and the second lane adapter.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: February 27, 2024
    Assignee: VIA LABS, INC.
    Inventor: Hao-Hsuan Chiu
  • Patent number: 11874927
    Abstract: An electronic apparatus and a secure firmware update method thereof are provided. The electronic apparatus includes a first integrated circuit chip, a first non-volatile memory chip, a second integrated circuit chip and a second non-volatile memory chip. The first integrated circuit chip includes a secure firmware update console, and the first non-volatile memory chip includes a spare data storage space. The first non-volatile memory chip and the second non-volatile memory chip store a first firmware code of the first integrated circuit chip and a second firmware code of the second integrated circuit chip, respectively. Firmware code update data are transferred to and stored in the spare data storage space. The secure firmware update console performs a firmware update procedure by writing the firmware code update data into the second non-volatile memory chip to overwrite the second firmware code after passing a verification procedure on the firmware code update data.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: January 16, 2024
    Assignee: VIA LABS, INC.
    Inventors: Hui-Neng Chang, Chi-Min Weng, Cheng-Ming Huang
  • Patent number: 11775041
    Abstract: A multi-port power supply device and an operation method thereof are provided. The multi-port power supply device includes a power converter, a power switch, a current detection circuit, a voltage detection circuit, a control circuit, and multiple USB ports. The power converter supplies power to a USB port via a current path. The control circuit determines whether the USB port is connected to a USB device according to an actual voltage of the current path. When the USB port is not connected to the USB device, the control circuit turns off the current path. When the USB port is connected to the USB device, after a part of a power of other USB ports is dynamically transferred to the USB port, the control circuit determines whether to turn on the current path according to an actual current of the current path.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: October 3, 2023
    Assignee: VIA LABS, INC.
    Inventors: Tze-Shiang Wang, Sheng-Hsien Yen, Hui-Neng Chang
  • Patent number: 11770015
    Abstract: Power management device and method for a consumer product are provided. The power management device includes a memory, a configuration channel interface circuit and a control circuit. When a power supply device is electrically connected to a connector of the consumer product, the control circuit performs a power delivery protocol conforming to a USB specification on the power supply device through the configuration channel interface circuit and a configuration channel pin of the connector, so as to determine a power mode in which the power supply device supplies power to the consumer product. After the power delivery protocol is performed successfully, based on at least one protocol profile stored in the memory, the control circuit performs a vendor-defined messaging protocol on the power supply device through the configuration channel interface circuit and the configuration channel pin, so as to determine whether to change the power mode.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: September 26, 2023
    Assignee: VIA LABS, INC.
    Inventors: Terrance Shiyang Shih, Chin-Sung Hsu, Nai-Chuan Hung
  • Patent number: 11768786
    Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: September 26, 2023
    Assignee: VIA LABS, INC.
    Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
  • Patent number: 11755087
    Abstract: A multi-port power supply device and an operation method thereof are provided. The multi-port power supply device includes multiple USB ports, multiple power converters, and a common control circuit. When an adjustment trend of an agreement power of a first USB port will make the agreement power greater than a rated minimum charging power of a USB device connected to the first USB port, the common control circuit dynamically changes the agreement power according to an actual output power of the first USB port. When the adjustment trend of the agreement power will make the agreement power less than the rated minimum charging power, the common control circuit does not change the agreement power, and the common control circuit dynamically transfers a power difference between the agreement power and the actual output power to other USB ports.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: September 12, 2023
    Assignee: VIA LABS, INC.
    Inventors: Tze-Shiang Wang, Sheng-Hsien Yen, Hui-Neng Chang
  • Patent number: 11735502
    Abstract: An integrated circuit chip has an active surface and a chip pad arrangement on the active surface. The chip pad arrangement includes four pairs of chip pads arranged in two rows along a side edge of the active surface. Two pairs of chip pads are a first transmission differential pair chip pad and a first reception differential pair chip pad respectively. Positions of the two pairs of chip pads are not adjacent to each other and are in different rows. The other two pairs of chip pads are a second transmission differential chip pad and a second reception differential chip pad respectively. Positions of the other two pairs of chip pads are not adjacent to each other and are in different rows. In addition, a package substrate corresponding to the integrated circuit chip and an electronic assembly including the package substrate and the integrated circuit chip are also provided.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: August 22, 2023
    Assignee: VIA LABS, INC.
    Inventor: Sheng-Yuan Lee
  • Publication number: 20230176954
    Abstract: A USB integrated circuit (IC), a testing platform and an operating method for USB integrated circuit are provided. The USB integrated circuit includes a USB port physical layer (PHY) circuit, a first lane adapter, a second lane adapter, a routing circuit, and a USB transport layer circuit. The USB PHY circuit is configured to transmit a differential signal between the USB integrated circuit and an outside device. When the USB integrated circuit operates in a testing mode, the routing circuit electrically connects the first lane adapter to the USB PHY circuit. When the USB integrated circuit operates in a working mode, the routing circuit electrically connects the second lane adapter to the USB PHY circuit. The USB transport layer circuit is coupled to the first lane adapter and the second lane adapter.
    Type: Application
    Filed: November 14, 2022
    Publication date: June 8, 2023
    Applicant: VIA LABS, INC.
    Inventor: Hao-Hsuan Chiu
  • Publication number: 20230169026
    Abstract: A USB IC, an operation method thereof, and a USB device are provided. The USB IC is disposed in the USB device and includes a sideband use interface circuit coupled to a sideband use pin of a USB connector of the USB device, and a control circuit. The control circuit is coupled to the sideband use interface circuit and reports a first adapter configuration to a USB host via the sideband use interface circuit so that the USB host enumerates the USB device. The control circuit observes a behavior of the USB host to the USB device after the USB device is enumerated. The control circuit determines whether the first adapter configuration is suitable for a connection manager of the USB host according to the behavior. If not, the control circuit reports a second adapter configuration to the USB host so that the USB host re-enumerates the USB device.
    Type: Application
    Filed: November 21, 2022
    Publication date: June 1, 2023
    Applicant: VIA LABS, INC.
    Inventors: Chun-Heng Lin, Terrance Shiyang Shih, Chin-Sung Hsu
  • Patent number: 11605590
    Abstract: A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer and correspondingly formed below the first spiral trace layer. The inter-metal dielectric layer has a separating region to divide the second spiral trace layer into line segments. First slit openings each passes through a corresponding line segment, and extends in an extending direction of a length of the corresponding line segment.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: March 14, 2023
    Assignee: VIA LABS, INC.
    Inventor: Sheng-Yuan Lee
  • Patent number: 11600612
    Abstract: A switch chip includes a first switch device, a first ESD protection device and a second ESD protection device. The first switch device is electrically coupled between a first pad and a second pad. The first ESD protection device is electrically coupled to a third pad which is electrically coupled to the first pad by a first bond wire. The second ESD protection device is electrically coupled to a fourth pad which is electrically coupled to the second pad by a second bond wire.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: March 7, 2023
    Assignee: VIA LABS, INC.
    Inventors: Didmin Shih, Tengyi Huang, Ting-Yen Wang, Yen Wei Wu