Patents Assigned to Vicor Corporation
  • Patent number: 11336167
    Abstract: Encapsulated electronic modules having complex contact structures may be formed by encapsulating panels containing a substrate comprising pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within terminal holes and other holes drilled in the panel within the boundaries of the cut lines. Slots may be cut in the panel along the cut lines. The interior of the holes, as well as surfaces within the slots and on the surfaces of the panel may be metallized, e.g. by a series of processes including plating. Solder may be dispensed into the holes for surface mounting. Two or more panels may be stacked prior to singulation to form module stacks. Delivering power vertically to semiconductor dies is described using multi-cell converters having a relatively large cell and output terminal pitch. Translation interconnections may be provided in a semiconductor package substrate, a system PCB, or in an interconnection module.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: May 17, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Rudolph F. Mutter
  • Patent number: 11324107
    Abstract: Electronic modules having complex contact structures may be formed by encapsulating panels containing pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within the panel along the cut lines. Holes defining contact regions along the electronic module sidewall may be cut into the panel along the cut lines to expose the buried interconnects. The panel may be metallized, e.g. by a series or processes including plating, on selected surfaces including in the holes to form the contacts and other metal structures followed by cutting the panel along the cut lines to singulate the individual electronic models. The contacts may be located in a conductive grove providing a castellated module.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: May 3, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Patrick R. Lavery, Rudolph F. Mutter, Jeffery J. Kirk, Andrew T. D'Amico
  • Patent number: 11304297
    Abstract: Encapsulated electronic modules having complex contact structures may be formed by encapsulating panels containing a substrate comprising pluralities of electronic modules delineated by cut lines and having conductive interconnects buried within terminal holes and other holes drilled in the panel within the boundaries of the cut lines. Slots may be cut in the panel along the cut lines. The interior of the holes, as well as surfaces within the slots and on the surfaces of the panel may be metallized, e.g. by a series of processes including plating. Terminals may be inserted into the terminal holes and connected to conductive features or plating within the holes. A conductive element may be provided on the substrate to connect to a terminal. Alternatively solder may be dispensed into the holes for surface mounting.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: April 12, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: 11290005
    Abstract: A power system includes a power conversion stage that receives power from an input source and delivers power to a load via a power distribution bus. The power distribution bus may include a DC transformer such as a fixed ratio bus converter or VTM having an equivalent series resistance. A control system samples the voltage delivered by the power conversion stage at a location close to the output of the power conversion stage, and the load voltage at a location close to the load. The samples may be synchronized by means of a data bus that provides communication between a control device and an output monitor. Synchronization may be accomplished within a sampling period that is short relative to changes in the voltages and currents. Each set of samples may be used to determine a value of the bus resistance. Multiple samples may be averaged to improve accuracy in the determination.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: March 29, 2022
    Assignee: VICOR CORPORATION
    Inventor: Patrizio Vinciarelli
  • Patent number: 11271490
    Abstract: An improved distributed-output multi-cell-element power converter utilizes a multiplicity of magnetic core elements, switching elements, capacitor elements and terminal connections in a step and repeat pattern. Stepped secondary-winding elements reduce converter output resistance and improve converter efficiency and scalability to support the high current requirements of very large scale integrated (“VLSI”) circuits.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: March 8, 2022
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11264911
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: March 1, 2022
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11266020
    Abstract: Circuit assemblies can be electrically interconnected by providing a circuit assembly having a top surface, a bottom surface, and a perimeter edge connecting the top and bottom surfaces, the perimeter edge being formed of insulative material and having a plurality of conductive features embedded in and exposed on the surface of the edge. The conductive features are arranged in contact sets, and each contact set is separated from adjacent contact sets by a portion of the perimeter edge that is free of conductive features. Each contact set includes conductive features that together form a distributed electrical connection to a single node. The insulative material is selectively removed to form recesses adjacent the conductive features exposing additional surface contact areas along lateral portions of the conductive features in the recesses.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: March 1, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Robert Joseph Balcius, Steven P. Sadler, Mark Andrew Thompson
  • Publication number: 20220052609
    Abstract: Apparatus for power conversion are provided. One apparatus includes a power converter including an input circuit and an output circuit. The power converter is configured to receive power from a source for providing power at a DC source voltage VS. The power converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC=VOUT/VIN at an output current, wherein VIN is an input voltage and VOUT is an output voltage. The input circuit and at least a portion of the output circuit are connected in series across the source, such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.
    Type: Application
    Filed: July 26, 2021
    Publication date: February 17, 2022
    Applicant: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Andrew D'Amico
  • Patent number: 11233447
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die. Multi-output POL circuits may be used in conjunction with on-chip rail-selection and regulation circuitry to further improve efficiency.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: January 25, 2022
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Andrew T. D'Amico
  • Patent number: 11228246
    Abstract: An isolated, power factor corrected, converter, for operation from a three-phase AC source, comprises three power processors, each power processor connected to one of the three phases. Each power processor comprises a cascade of a first and a second power conversion stage. At least one of the first and second power converters in each power processor is configured to provide galvanic isolation through a DC Transformer between the power processor input and output. At least one of the first and second power converters in each power processor is configured to provide power factor correction at the AC source. Substantially all of the bulk energy storage and low frequency filtering is provided by storage elements at the output of the power system. Low voltage semiconductor devices may be cascaded to implement low output capacitance high voltage switches in a multi-cell resonant converter for high voltage applications.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: January 18, 2022
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11101795
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: August 24, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Andrew T. D'Amico
  • Patent number: 11075583
    Abstract: Apparatus for power conversion are provided. One apparatus includes a power converter including an input circuit and an output circuit. The power converter is configured to receive power from a source for providing power at a DC source voltage VS. The power converter is adapted to convert power from the input circuit to the output circuit at a substantially fixed voltage transformation ratio KDC=VOUT/VIN at an output current, wherein VIN is an input voltage and VOUT is an output voltage. The input circuit and at least a portion of the output circuit are connected in series across the source, such that an absolute value of the input voltage VIN applied to the input circuit is approximately equal to the absolute value of the DC source voltage VS minus a number N times the absolute value of the output voltage VOUT, where N is at least 1.
    Type: Grant
    Filed: February 4, 2020
    Date of Patent: July 27, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Andrew D'Amico
  • Patent number: 11018599
    Abstract: A DC-to-DC transformer converts power from an input source to a load using a fixed voltage transformation ratio. The density of point of load power conversion may be increased and the associated power dissipation reduced by removing the input driver circuitry from the point of load where it is not necessary. An output circuit may be located at the point of load providing fault tolerant rectification of the AC power from the secondary winding of a power transformer which may be located nearby the output circuit. The driver circuit may drive a plurality of transformer-output circuit pairs. The transformer and output circuit may be combined in a single module at the point of load. Alternatively, the output circuit may be integrated into point of load circuitry such as a processor core. The transformer may be deployed near the output circuit.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: May 25, 2021
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11018594
    Abstract: A power converter including a transformer, a resonant circuit including the transformer and a resonant capacitor having a characteristic resonant frequency and period, and output circuitry connected to the transformer for delivering a rectified output voltage to a load. Primary switches drive the resonant circuit, a switch controller operates the primary switches in a series of converter operating cycles which include power transfer intervals of adjustable duration during which a resonant current at the characteristic resonant frequency flows through a winding of the transformer. The operating cycles may also include energy recycling intervals of variable duration for charging and discharging capacitances within the converter.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: May 25, 2021
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 11006523
    Abstract: Circuit assemblies can be electrically interconnected by providing a circuit assembly having a top surface, a bottom surface, and a perimeter edge connecting the top and bottom surfaces, the perimeter edge being formed of insulative material and having a plurality of conductive features embedded in and exposed on the surface of the edge. The conductive features are arranged in contact sets, and each contact set is separated from adjacent contact sets by a portion of the perimeter edge that is free of conductive features. Each contact set includes conductive features that together form a distributed electrical connection to a single node. The insulative material is selectively removed to form recesses adjacent the conductive features exposing additional surface contact areas along lateral portions of the conductive features in the recesses.
    Type: Grant
    Filed: March 30, 2018
    Date of Patent: May 11, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Robert Joseph Balcius, Steven P. Sadler, Mark Andrew Thompson
  • Patent number: 10998903
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: May 4, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Andrew T. D'Amico
  • Patent number: 10951113
    Abstract: A power converter system converts power from an input source for delivery to an active load. An input current surge at startup may be reduced by combining power converter switch resistance modulation with active load control. In another aspect, an input current surge at startup in an array of power converters may be reduced by periodically reconfiguring the array during the startup phase to accumulatively increase the output voltage up to a predetermined output voltage. A power converter may include a controller that provides an over-current signal to the load to reduce the load or advise of potential voltage perturbations.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: March 16, 2021
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: 10938311
    Abstract: A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: March 2, 2021
    Assignee: Vicor Corporation
    Inventor: Patrizio Vinciarelli
  • Patent number: D911280
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: February 23, 2021
    Assignee: Vicor Corporation
    Inventors: Patrizio Vinciarelli, Michael B. LaFleur
  • Patent number: D942406
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: February 1, 2022
    Assignee: VICOR CORPORATION
    Inventors: Patrizio Vinciarelli, Michael LaFleur