Patents Assigned to Videologic Limited
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Patent number: 5977995Abstract: A computer which is capable of displaying both video and graphical data is provided with a central processing unit (10), a memory controller (14), and a display system (4). These units are all connected to a bus (16). Modular functional units (2), e.g. video codecs, TV outputs, audio subsystems, are used to provide optional additional functions for the display system. A coupling means (6, 12) is provided to link the modular functional units to the display system (4) and to the memory controller (14).Type: GrantFiled: November 30, 1995Date of Patent: November 2, 1999Assignee: VideoLogic LimitedInventor: Hossein Yassaie
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Patent number: 5968167Abstract: A data processing management system for controlling the execution of multiple threads of processing instructions such as the instructions that are employed to process multimedia data. The management system includes a media control core, a number of data processing units and a multi-banked cache. For the processing instruction for each thread, the multimedia core identifies the data processing operation to be executed as well as the resources needed to execute that operation. The multimedia core then determines for each instruction if all the resources are available to execute the operation. For the operations for which all the resources are available, the multimedia core then determines which operation has the highest priority. The operation having the highest priority is then passed to one of the data processing units for execution. The data and addresses upon which the data processing units act are temporarily stored in the multi-banked cache. Data are written into the cache from multiple input ports.Type: GrantFiled: April 3, 1997Date of Patent: October 19, 1999Assignee: Videologic LimitedInventors: James Robert Whittaker, Paul Rowland
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Patent number: 5943065Abstract: A video/graphics memory system includes a memory device (30) having a memory core (14) and first and serial registers (16, 36). The memory device thus has a random-access port (24) for graphics data, a first serial access port (22) for image output to a display, and an auxiliary or second serial port (32) for input and output of video signal data. A single memory thus stores both video and graphics data, while the processor still has access to the random access port of the memory. Two video outputs can be provided simultaneously, or the data withdrawn through the auxiliary port can be subject to processing and then written back into the memory. In alternative arrangements, instead of using triple-ported RAM, the auxiliary port is provided by the use of external multiplexing circuitry.Type: GrantFiled: July 21, 1994Date of Patent: August 24, 1999Assignee: VideoLogic LimitedInventors: Hossein Yassaie, John Anthony Metcalfe, Graham Deacon, Martin Ashton
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Patent number: 5910795Abstract: A raster scanned image may be scaled up or down for display on e.g. a portion of a computer display. This is achieved by dividing the image into a plurality of image cells each with a horizontal width less than that of the whole image. A smoothing algorithm is then applied to the lines of each cell in turn to generate new pixel data in dependence on the scaling operation to be performed. The scaling means stores a number of lines of data from a cell the number being dependent on the particular smoothing algorithm being used. To facilitate scanning of the image cell structure additional sync pulses are generated. These are cell horizontal and cell vertical sync pulses.Type: GrantFiled: November 14, 1994Date of Patent: June 8, 1999Assignee: VideoLogic LimitedInventor: James Robert Whittaker
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Patent number: 5801686Abstract: A computer display system and method for displaying a sequence of video images in a portion of a graphic display. The video images are provided to the system along with a first set commands that define the size of the images relative to the display as well as their position for insertion into the display. A command modifier, internal to the display system modifies the first set of video image size/position commands to produce a second set of commands. These modifications are performed by the command modifier in response to signals such as from user-generated commands. The second set of video image size/position commands are then forwarded, respectively to a scaling unit and a image insertion unit. The scaling unit scales the video image signals based on the size commands contained in the second set of commands. The insertion unit inserts the scaled video image sequence into the graphics display based on the second set of commands.Type: GrantFiled: February 28, 1996Date of Patent: September 1, 1998Assignee: Videologic LimitedInventors: Nicholas Heinrich Jurascheck, Raymond Malcolm Livesley
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Patent number: 5729672Abstract: A method and apparatus for shading three-dimensional images for display on a screen by displaying each object as a group of infinite surfaces, projecting rays into the image, determining the location of the intersection of each ray with each surface and determining whether any intersected surface is visible at an elementary, pixel, level. Shading that occurs as a in-image light projection is analyzed by designating the generated light as a light volume determining the intersection of the ray with the light volume, and shading the pixel point as a function of the relationship between the visible surface and the light volume. The rate of shading is enhanced by dividing the screen into a number of sub-regions and determining the location of the intersection of each object contained with the sub-region through the rays projected into the sub region. The size of the sub-regions is set by determining a bounding volume for each object on the display screen and subdividing the display based on the bounding volumes.Type: GrantFiled: June 6, 1995Date of Patent: March 17, 1998Assignee: Videologic LimitedInventor: Martin Ashton
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Patent number: 5596685Abstract: Each object in a 3-dimensional image to be displayed may be represented by a set of infinite surfaces. Each elementary area of a screen on which the image is to be displayed has a ray projected through it onto the 3-dimensional image. The location of the intersection of the projected ray with each surface is then determined and from these locations it is determined whether any intersected surface is visible at that elementary area. The elementary area is then shaded for display in dependence on the result of the determination.Type: GrantFiled: July 26, 1994Date of Patent: January 21, 1997Assignee: VideoLogic LimitedInventor: Martin Ashton
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Patent number: 5455628Abstract: A converter receives a computer graphics signal from a PC and provides from it a video signal for display or recording. Analogue RGB signals are digitised and applied to a vertical filter and rate buffer. The rate buffer needs only one to three lines of storage capacity. The received graphics signal is a VGA 640.times.480 non-interlaced mode signal, and the rate buffer halves the line rate and produces an interlaced output. Such a signal can be treated as a video signal, after reconversion to analogue form. The vertical filter provides a degree of vertical averaging to remove flicker. In a preferred store using three line-store FIFOs, input lines are applied to them in the sequence A,B,C,B,A, and so on.Type: GrantFiled: September 16, 1993Date of Patent: October 3, 1995Assignee: VideoLogic LimitedInventor: Michael D. Bishop
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Patent number: 5359367Abstract: A broadcast receiver (22) for receiving television broadcast signals carrying encoded data e.g. teletext information, includes a tuner (30), a demodulator (32) and a data extractor (36) for decoding the data. The receiver is coupled to a computer through a bus (38) and an interface controller (40). The tuner (30), the demodulator (32) and the data extractor (36) are each individually controllable by the interface controller (40) in response to instructions from the computer to vary any of the tuning, the demodulation parameters, or the data extraction parameters. A data processor (54) processes the extracted data, and can also control the tuner (30), the demodulator (32) and the data extractor (36).Type: GrantFiled: June 8, 1992Date of Patent: October 25, 1994Assignee: Videologic LimitedInventor: Trevor R. Stockill
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Patent number: 5201038Abstract: A base board 10 carries four daughter cards 12a, 12b, 12c and 12d. Three of the daughter boards 12a, 12b, 12c are stacked on the front side of the base board 10, and the fourth daughter board 12d is carried on the rear side of the base board 10. Modifying means are provided on the daughter cards for modifying addresses sent from the base card to the daughter cards. This allows the daughter cards 12 to be identical, and still enables individual addressing of the daughter boards according to their position in the stack.Type: GrantFiled: October 30, 1991Date of Patent: April 6, 1993Assignee: Videologic LimitedInventor: Dennis A. Fielder
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Patent number: 5027212Abstract: A computer based video/graphics display system includes a computer system (22) having a graphics generator (24). A video signal from a video source (28) is fed through an input stage (26) to an asynchronous converter (30). The converter (30) synchronises the video signal to the graphics generator (24). The output from the asynchronous converter (30) and the output from the graphics generator (24) are fed to a fading/mixing matrix (34). The combined signal output from the fading/mixing matrix is fed to a computer display monitor (14). The system allows the mixing or windowing of computer graphics and a video image on a common display.Type: GrantFiled: December 6, 1989Date of Patent: June 25, 1991Assignee: Videologic LimitedInventors: Anthony P. Marlton, Dennis A. Fielder, Victor G. Halsted, Trevor R. Stockill