Abstract: Self-aligned sextuple patterning (SASP) processes and mask design methods for the semiconductor manufacturing are invented. The inventions pertain to methods of forming one and/or two dimensional features on a substrate having the feature density increased to six times of what is possible using the standard optical lithographic technique; and methods to release the overlay requirement when patterning the critical layers of semiconductor devices. Our inventions provide production-worthy methods for the semiconductor industry to continue device scaling beyond 15 nm (half pitch).

Abstract: A novel near-field EUV patterning technique and the corresponding imaging film stacks are invented for integrated-circuit manufacturing. This invention pertains to methods of forming one and/or two dimensional features on an EUV near-field imaging material with patterned light absorbers sitting on its top. These methods can be used to produce integrated circuits with a feature density higher than what is possible using conventional EUV or optical DUV lithography.

Abstract: A novel process technique and mask design based on the optimized self-aligned triple patterning are invented for the semiconductor manufacturing. This invention pertains to methods of forming one and/or two dimensional features on a substrate having the feature density increased to three times of what is possible using optical lithography, and methods to release the overlay requirement when patterning the critical layers of semiconductor devices.