Abstract: A multilayered ceramic chip capacitor. An electrode ink pattern is formed on a release film. The electrode ink pattern is calendered, densified and flattened. Dielectric material is applied to the release film and surrounds but does not cover the electrode ink to form an electrode surround printed dielectric sheet. The dielectric is calendered, densified and flattened. The densities of the electrode ink and dielectric are formulated such that after calendering the electrode ink and dielectric surfaces are substantially coplanar. A final overcoat of dielectric is applied over the surround printed dielectric sheet.