Abstract: An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles.

Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.

Abstract: An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles.

Abstract: An apparatus and method for a two semiconductor device package where the semiconductor devices are connected in electrical series. The first device is mounted P-side down on an electrically conductive substrate. Non-active area on the P side is isolated from the electrically conductive substrate. The second device is mounted P-side up at a spaced apart location on the substrate. Opposite sides of each are electrically connected to leads to complete the series connection of the two devices. A method of manufacturing such a package includes providing an electrically conductive lead frame, mounting one device P-side up and flipping the other device and mounting it P-side down on the lead frame with non-active area of the P side isolated from the lead frame, and connecting the other side of each device to separate leads. Isolation of the non-active area of the P side of the device can be through modification of the substrate or lead frame surface by grooves or raised portions.

Abstract: An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles.

Abstract: An electronic element testing apparatus for use with a number of probes. Each probe has a lower pole and an upper pole. The apparatus includes: a first plate having a first side and a second side, the first side having an array of lower pole regions disposed thereabout, each lower pole region configured to receive a lower pole of a probe; and a plurality of signal conductor regions disposed proximate the array of lower pole regions, each signal conductor region arranged to provide a non-cable electrical path between a lower pole region and a switching circuit. The switching circuits are operable to sequentially connect each electronic element to a testing circuit via the upper and lower poles.

Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one terraced trench in the epitaxial layer. The terraced trench has a plurality of portions that differ in width to define at least one annular ledge therebetween. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material lining the annular ledge and said trench bottom and into adjacent portions of the epitaxial layer. The dopant is diffused to form at least one annular doped region in the epitaxial layer and at least one other region located below the annular doped region.