Patents Assigned to Visual Photonics Epitaxy Co., Ltd.
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Patent number: 8994069Abstract: A high electron mobility bipolar transistor including a substrate, a pseudomorphic high electron mobility transistor (pHEMT) sub structure, a sub collector/separating layer and a heterojunction bipolar transistor (HBT) sub structure sequentially stacked from bottom to top is disclosed. The sub collector/separating layer and the pHEMT sub structure are combined to form a pHEMT, and the sub collector/separating layer and the HBT sub structure are combined to form an HBT. The carbon concentration in the sub collector/separating layer is within 5×1017 cm?3 and 1×1020 cm?3, and/or the oxygen concentration within 5×1018 cm?3 and 1×1020 cm?3. The lattice during the process of epitaxy growth is stabilized and it is possible to prevent the dopants, the elements, the vacancies or the defects from diffusing into the neighboring layers, thereby improving the problem of mobility degradation and resistance increase, and sustaining the stability of the manufacturing process.Type: GrantFiled: June 5, 2013Date of Patent: March 31, 2015Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Yu-Chung Chin, Chao-Hsing Huang
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Patent number: 7573080Abstract: The HBT-based transient suppression device contains a collector layer of a first conduction type, a base layer of a second conduction type, an emitter layer of the first conduction type, stacked in this order sequentially on a top side of a heavily doped substrate of the first conduction type. The doping concentration of the base layer is higher than that of the emitter and collector layers, and that the thickness of the collector layer is less than 300 nm, so that the BVCEO breakdown voltage is reduced below 5V Additionally, the thickness of the base layer is larger than the sum of the thickness of a section of the emitter-base depletion region extending into the base layer and the thickness of a section of the base-collector depletion region extending into the base layer, so that the base layer is not operated in a punch-through condition.Type: GrantFiled: June 20, 2008Date of Patent: August 11, 2009Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Chao-Hsing Huang, Yu-Chung Chin
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Patent number: 7385236Abstract: The invention provides a BiFET semiconductor device vertically integrating a FET and a HBT on the same substrate. The BiFET semiconductor device comprises a HBT structure, a high-resistivity structure, and a FET structure, sequentially formed in this order from bottom to top on a semi-insulating substrate. The high-resistivity structure comprises at least two layers. A first layer is on top of the HBT structure to provide the required high resistivity, while the second layer having a high purity is on top of the first layer to prevent the doped impurity in the first layer to affect the upper FET structure.Type: GrantFiled: October 21, 2005Date of Patent: June 10, 2008Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Yu-Chung Chin, Chao-Hsing Huang, Wei-Chou Wang, Kun-Chuan Lin
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Patent number: 7384808Abstract: A method for fabricating a high brightness LED structure is disclosed herein, which comprises at least the following steps. First, a first layered structure is provided by sequentially forming a light generating structure, a non-alloy ohmic contact layer, and a first metallic layer from bottom to top on a side of a first substrate. Then, a second layered structure comprising at least a second substrate is provided. Then, the two-layered structures are wafer-bonded together, with the top side of the second layered structure interfacing with the top side of said first layered structure. The first metallic layer functions as a reflective mirror, which is made of a pure metal or a metal nitride to achieve superior reflectivity, and whose reflective surface does not participate in the wafer-bonding process directly.Type: GrantFiled: July 12, 2005Date of Patent: June 10, 2008Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Jin-Hsiang Liu, Hui-Heng Wang, Kun-Chuan Lin
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Patent number: 7335924Abstract: An LED structure is disclosed herein, which comprises, sequentially arranged in the following order, a light generating structure, a non-alloy ohmic contact layer, a metallic layer, and a substrate. As a reflecting mirror, the metallic layer is made of a pure metal or a metal nitride for achieving superior reflectivity. The non-alloy ohmic contact layer is interposed between the metallic layer and the light generating structure so as to achieve the required ohmic contact. To prevent the metallic layer from intermixing with the non-alloy ohmic contact layer and to maintain the flatness of the reflective surface of the first metallic layer, an optional dielectric layer is interposed between the metallic layer and the non-alloy ohmic contact layer.Type: GrantFiled: July 12, 2005Date of Patent: February 26, 2008Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Jin-Hsiang Liu, Hui-Heng Wang, Kun-Chuan Lin
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Patent number: 7224005Abstract: A material made by arranging layers of gallium-arsenide-antimonide (GaAsxSb1-x, 0.0?x?1.0) and/or indium-gallium-arsenic-nitride (InyGa1-yAszN1-z, 0.0?y, z?1.0) in a specific order is used to form the transistor base of a heterojunction bipolar transistor. By controlling the compositions of the materials indium-gallium-arsenic-nitride and gallium-arsenide-antimonide, and by changing the thickness and order of the layers, the new material would possess a specific energy gap, which in turn determines the base-emitter turn-on voltage of the heterojunction bipolar transistor.Type: GrantFiled: September 3, 2004Date of Patent: May 29, 2007Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Chao-Hsing Huang, Yu-Chung Chin, Min-Nan Tseng, Huai-Tung Yang, Kun-Chuan Lin, Shih-Jane Tsai
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Patent number: 6287882Abstract: A method of manufacturing a light emitting diode (LED) includes growing a light emitting region on a temporary substrate, bonding a metal-coated reflective permanent substrate and then removing the temporary substrate. The reflective metal layer also serves as a bonding agent for bonding the permanent substrate. The bonded LED element and permanent substrate are heated in a wafer bonding tool that includes a graphite lower chamber and a graphite upper cover with a stainless steel screw. Because of the different thermal expansion coefficients between stainless and graphite, the stainless steel screw applies a pressure to the bonded structure during the heating process to assist the bonding of the permanent substrate.Type: GrantFiled: October 4, 1999Date of Patent: September 11, 2001Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Kuo-Hsiung Chang, Kun-Chuan Lin, Ray-Hua Horng, Man-Fang Huang, Dong-Sing Wuu, Sun-Chin Wei
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Patent number: 6258699Abstract: A method of manufacturing a light emitting diode (LED) includes growing a light emitting region on a temporary substrate, bonding a transparent substrate of glass or quartz to the light emitting region and then removing the temporary substrate. A metal bonding agent also serving as an ohmic contact layer with LED is used to bond the transparent substrate to form a dual substrate LED element which is then heated in a wafer holding device that includes a graphite lower chamber and a graphite upper cover with a stainless steel screw. Because of the different thermal expansion coefficients between stainless and graphite, the stainless steel screw applies a pressure to the dual substrate LED element during the heating process to assist the bonding of the transparent substrate.Type: GrantFiled: May 10, 1999Date of Patent: July 10, 2001Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Kuo-Hsiung Chang, Kun-Chuan Lin, Ray-Hua Horng, Man-Fang Huang, Dong-Sing Wuu, Sun-Chin Wei, Lung-Chien Chen
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Patent number: 6100544Abstract: A light emitting diode includes a double hetero structure containing an upper cladding layer with a graded composition. The light emitting diode comprises a GaAs substrate, a first ohmic contact to the substrate, an AlGaInP lower cladding layer formed on the GaAs substrate, an AlGaInP active layer formed on the lower cladding layer, an AlGaInP upper cladding layer formed on the active layer and a second ohmic contact. The AlGaInP upper cladding layer has a graded composition which increases the LED brightness and decreases the forward bias voltage of the light emitting diode. The graded composition can also be used in the upper semiconducting layer of a conventional p-n junction light emitting diode.Type: GrantFiled: May 20, 1998Date of Patent: August 8, 2000Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Kun-Chuan Lin, Lung-Chien Chen
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Patent number: 6064076Abstract: A light-emitting diode having a transparent substrate contains a transparent GaP substrate having a first lattice constant, a first ohmic contact to the GaP substrate, a buffer layer having a graded lattice constant which gradually changes from a first lattice constant to a second lattice constant, a light generating region formed on the buffer layer and having the second lattice constant, and a second ohmic contact formed on the light generating region. In the present invention, light emitted to the substrate is not absorbed by the transparent substrate. Therefore, the brightness of the LED is increased and the V.sub.f value is not increased.Type: GrantFiled: May 20, 1998Date of Patent: May 16, 2000Assignee: Visual Photonics Epitaxy Co., Ltd.Inventors: Lung-Chien Chen, Kun-Chuan Lin