Abstract: Disclosed is an MC-CDMA scrambling system and method, and a recording medium for storing a program thereof. A transmitter receives user's bit streams, uses a fixed scrambling code, determined according to the user's orthogonal code combinations or the number of users and having a length equal to the number of subcarriers, and generates and outputs multicarrier signals. A receiver uses the scrambling code equal to that used by the transmitter, and receives the multicarrier signals from the transmitter, thereby converting the scrambling codes according to the users' orthogonal code combinations irrespective of user data, and easily reducing the PAPR (peak-to-average power ratio).

Abstract: The present invention relates to a distributed arithmetic module employing a zero input detection circuit that reduces electric power consumption by avoiding unnecessary calculation. An apparatus for performing a discrete cosine transform (DCT) on a video signal, including; input unit for receiving the video signal in a block by block basis; discrete cosine transform (DCT) unit for receiving each image data block from the input unit and conducting a discrete cosine transform/inverse discrete cosine transform (DCT/IDCT) operation on the received image data block to generate a transformed image data block containing N×M pixel value; zero input detect unit for determining whether pixel values of a current image data block are all “0” and generating a detection signal in order to bypass the DCT/IDCT performing on the current image block; and output unit for outputting the transformed image data block as a transformed video signal.

Abstract: A symbol combining method in a Rake receiver, which relates to a method for combining the demodulated multi-path signals in a demodulation process of a code division multiple access communication system. The symbol combining method, a Rake receiver using the symbol combining method and a method for driving the Rake receiver, remarkably reduce a hardware complexity of a FIFO register used to regulate a timing synchronization of each finger in Rake receiver by using a new algorithm in a combining process when a CDMA communication system combines a plurality of multi-path signals therebetween. Whereas a conventional combining algorithm uses an individual FIFO register every finger so as to adjust a timing synchronization of each symbol before combining a demodulated symbol, the inventive combining algorithm performs a symbol combining operation as well as a timing synchronization of a symbol at the same time, and performs a combining action by using only one FIFO register irrespective of the number of fingers.

Abstract: A hardware structure for adaptively prediction coding an image signal using spatial correlation and a method therefor are provided. The prediction coding apparatus has a packet change detection unit which determines whether or not blocks used to determine a prediction direction for a current block for which prediction is currently performed is included in a same packet to which the current block belongs; a prediction reference value providing unit which provides a prediction reference value used in prediction according to the result of determination by the packet change detection unit; and a prediction calculation unit which outputs a predictive coded value or a predictive decoded value using the prediction reference value provided by the prediction reference value providing unit and the DCT component of the current block according to an operation mode. According to the apparatus and method, the size of a prediction apparatus is reduced, and one apparatus is used both in coding and decoding.

Abstract: An apparatus and a method for carrying out a fast discrete cosine transform (DCT) with same positions of input and output data, and also a recording medium which is readable by a computer with a program loaded thereon, are disclosed. In the intermediate arithmetic procedure of the one-dimensional or two-dimensional forward or inverse DCT, the positions of the input and output data are made same, and therefore, an additional memory is not required. Specifically, the apparatus for carrying out the fast discrete cosine transform (DCT) with same positions of input and output data includes an input data sequence transposing means for transposing a sequence of an externally inputted input data by using a transposing matrix E. A butterfly arithmetic means carries out a butterfly arithmetic operation by using a Gt−1Bt−1. Gt−2Bt−2 . . . G0B0 matrix on a data obtained as a result of transposing the sequence of the input data by the input data sequence transposing means.