Abstract: A wafer testing device in which a plurality of wafers can be tested simultaneously significantly reducing the time required for testing each chip. A prober is provided which receives a wafer to be tested. A probe card is coupled to the prober having a window through which a plurality of semiconductor memory chips on the wafer are observable. A plurality of probes are coupled to the periphery of the window in such a manner that the probes can be brought into contact with bonding pads on the plurality of semiconductor memory chips. A tester is connected to the probes which is capable of simultaneously testing each of the plurality of chips.

Abstract: A packaged semiconductor device structure includes a semiconductor chip with an organic material covering thereon. The semiconductor chip is placed in a package and hermetically sealed with a low melting point glass. The organic covering serve to suppress undesirable influence on the semiconductor chip by .alpha.-rays which may be radiated from the package, and a getter material is placed in the package for decreasing undesirable gases in the package which may be emitted by the organic covering during the sealing process.

Abstract: A pattern forming method for semiconductor devices in which a film layer of a compound containing silicon and nitrogen is formed between a substrate and a resist layer with a desired pattern readily formed utilizing a lift-off technique. A first film layer of a compound such as Si.sub.3 N.sub.4 is formed on a semiconductor substrate with a resist film layer formed in a desired pattern upon the first film layer. The first film layer is etched using the resist film layer as a mask. A second film layer is then formed on the substrate after which the first film layer is removed with an etchant which does not attack the second film layer.

Abstract: An MOS semiconductor device, wherein a buried region of silicon oxide or silicon nitride extends partly over the bottom plane of the channel region of an MOS transistor.

Abstract: This invention provides a method for manufacturing a bipolar transistor which comprises steps of selectively forming in the surface of a semiconductor substrate an embedded layer of a conductivity type opposite to that of the substrate, covering the substrate with an insulating layer doped, at the surface thereof with an impurity in the superficial region thereof, removing by etching the insulating layer to form an opening portion through which part of the embedded layer is exposed, simultaneously forming by epitaxial growth a single-crystal semiconductor layer of the same conductivity type as that of the embedded layer on the embedded layer at the opening portion and a polycrystalline semiconductor layer on the insulating layer, diffusing by heating the impurity in the insulating layer into the polycrystalline semiconductor layer to provide a conductivity type opposite to that of the single-crystal semiconductor layer, and successively forming an internal base region and an emitter region in the single-cryst

Abstract: A semiconductor device manufacturing unit in which plasma gas is maintained sealed in a quartz tube by a magnet disposed outside the quartz tube to make the density of plasma gas high and uniform thereby improving the quality of CVD films deposited with the gas and reducing the processing time for semiconductor wafers. A wafer holder is movably mounted in the quartz tube. A support bar is provided for moving the wafer holder with the support bar serving additionally as a ground electrode. An RF electrode and magnet are disposed outside the quartz tube. A heater may be disposed outside the RF electrode and magnet.

Abstract: A parallel-plate type gas plasma etching apparatus for etching a workpiece having a multilayer structure having a high etch rate ratio. A pair of parallel-plate electrodes are disposed in a reactor. A workpiece to be etched is disposed upon one of the electrodes. The reactor is held at a predetermined pressure and an etching gas supplied thereto. Rf power is applied between the electrodes with the positive terminal of the rf generator being coupled to the electrode upon which the workpiece is disposed. The frequency of the rf power is 10 MHz or less.

Abstract: A positioning apparatus employing a piezo worm type shifting mechanism in which the position of a platform to be moved to a desired position is measured with a position measuring device and data representing the position thus measured is applied to a microprocessor. The microprocessor calculates the phase of a voltage corresponding to the distance through which the platform should be moved to arrive at the desired position. The digital output is subjected to digital-to-analog conversion and a pulsive voltage produced thereby the magnitude of which corresponds to the distance to be moved. The pulsive voltage is applied directly to expanding and contracting piezoelectric elements which move the platform. The platform is thereby positioned at the desired position at a high speed and with a high accuracy.

Abstract: A method for easily measuring surface temperature distribution of a sample consisting of a plurality of coexisting materials having different radiation factors at a specified temperature and a system for performing the surface temperature measuring method. In this measuring method, a sample is at first kept at a known temperature, and the amount of infrared rays radiated from a plurality of narrow regions divided on the surface of the sample is obtained. This measurement is performed at least twice at two known temperatures and therefrom temperature coefficients of infrared rays of each of a plurality of subdivided regions on the surface of the sample are then obtained. Succeedingly, with a sample being under the measuring condition, the amount of infrared rays radiated from a plurality of regions on the surface of the sample is measured.

Abstract: A method of manufacturing a single crystal silicon rod by the pulling method which is characterized in that the intracrystal temperature of the growing single crystal silicon rod is reduced from 900.degree. to 500.degree. C. in less than 4 hours.

Abstract: A method of manufacturing a semiconductor device comprising a step of forming a desired opening in an insulating film formed on a single-crystalline semiconductor substrate, a step of forming an impurity-doped amorphous or polycrystalline semiconductor layer to cover the surface of said insulating film and the exposed surface of said semiconductor substrate in said opening, and a step of irradiating said semiconductor layer with a laser beam to let a portion of said semiconductor layer on said insulating film be polycrystallized or remain polycrystalline and let a portion of said semiconductor layer on said semiconductor substrate be single-crystallized to form a junction between said single-crystallized semiconductor layer portion and said semiconductor substrate.

Abstract: In a gettering method for processing semiconductor wafers a semiconductor wafer such as a silicon wafer is first annealed in a non-oxidizing atmosphere, for example, in a nitrogen atmosphere, at a temperature in the range of 950.degree. to 1,300.degree. C., preferably at 1,050.degree. C., for more than 10 minutes, for example for four (4) hours, to diffuse out oxygen near the surfaces of the semiconductor wafer. Then the semiconductor wafer is annealed at a temperature in the range of 600.degree. to 800.degree. C., for example at 650.degree. C., for more than one hour, preferably for 16 hours, to create in the interior of the semiconductor wafer microdefects of high density.

Abstract: A method of manufacturing a semiconductor device for simultaneously forming a plurality of diffused regions of selectively different diffusion depths, comprises forming polycrystalline semiconductor layers of corresponding, selectively different depths on the semiconductor substrate surface provided with a diffusion mask having a plurality of diffusion windows. By the impurity diffusion into the substrate through the windows at the polycrystalline semiconductor layer interface with the substrate, a comparatively shallow diffused region and a comparatively deep diffused region are formed simultaneously by a single diffusion process, respectively, under the comparatively thick polycrystalline semiconductor layer and the comparatively thin polycrystalline semiconductor layer.

Abstract: A method for producing a semiconductor device comprises the steps of selectively etching a part of a second conductivity type semiconductor layer formed on a first conductivity type semiconductor substrate where an isolating oxide layer is to be formed; introducing a first conductivity type impurity into a substrate contact forming part extending from the bottom of said etched part, by way of the side surface thereof, to the top surface of said second conductivity type semiconductor layer to form a substrate contact; thermally oxidizing said etched part to form an isolating oxide layer and forming a semiconductor element in said second conductivity type semiconductor layer.

Abstract: A method of manufacturing a semiconductor device comprising a step of covering a principal surface of a semiconductor substrate having semiconductor regions formed therein and at least partly provided with a silicon oxide film with a cover film having an etching characteristic different from that of the oxide film, a step of forming a first deposition layer having a higher etching speed than that of the cover layer on the cover layer, a step of forming a second deposition layer having a lower etching speed than that of the first deposition layer on the first deposition layer, a step of etching away portions of the second and first deposition layers and cover layer corresponding to a wiring pattern in succession, a step of etching the exposed portions of the silicon oxide film with the cover layer having the openings as a mask to thereby form contact holes with respect to the semiconductor substrate, and a step of forming wiring leads by depositing a wiring metal and etching away the first deposition layer and

Abstract: A photomask comprises a transparent film of conductive material and a light shielding film of predetermined pattern on a transparent substrate. The pattern film is made of a metallic element having its atomic number not smaller than 25 or a composition containing the metallic element. The photomask structure is suited to the case where the pattern formed on the mask is inspected with an electron beam. With the mask structure, the contrast of a pattern related information signal (backscattered electrons, secondary electrons, absorption current, etc.) derived from the mask upon irradiation thereof with the electron beam is improved.

Abstract: An electron beam type pattern transfer apparatus has a photoelectric mask and a sample in a vacuum container made of non-magnetic material. The photoelectric mask is adapted to receive an ultraviolet ray from a light source and emit photoelectrons corresponding to a predetermined transfer pattern and the sample is disposed in parallel with the photoelectric mask with a predetermined distance left therebetween and illuminated with the photoelectrons to form a resist image thereon which corresponds to the transfer pattern. A power source for applying a voltage for accelerating the photoelectrons emitted is connected between the photoelectric mask and the sample. A pair of focusing magnets are disposed around the axis of the vacuum container such that they are located one at one outer side and one in an opposite outer side of the vacuum container to permit a vertical magnetic field to be created between the photoelectric mask and the sample.

Abstract: Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated gate electrode is formed to extend over the semiconductor layer region around a semiconductor region in which FET is to be implemented. A semiconductor layer pattern underlying the extension of the gate electrode is enclosed by linear dielectric layers formed along the periphery of the electrode extension through electron beam irradiation. The pattern formation can be accomplished in a short time by virtue of arrangement such that the semiconductor layer pattern is enclosed by the linear dielectric layers. Electric coupling such as capacitive coupling between the gate electrode and other conductor layers is significantly reduced.

Abstract: A parallel-plate type gas plasma etching apparatus for etching a workpiece having a multilayer structure having a high etch rate ratio. A pair of parallel-plate electrodes are disposed in a reactor. A workpiece to be etched is disposed upon one of the electrodes. The reactor is held at a predetermined pressure and an etching gas supplied thereto. Rf power is applied between the electrodes with the positive terminal of the rf generator being coupled to the electrode upon which the workpiece is disposed. The frequency of the rf power is 10 MHz or less.

Abstract: An electron gun for a shaped beam type electron beam delineating system is provided with a cathode which is prepared from a single crystal of lanthanum hexaboride (LaB.sub.6) the convex end portion of which has a tip radius ranging between 260 and 1,000 microns. The electron gun of the invention has a long effective life for producing a stable electron beam which can irradiate a limiting aperture with a uniform current density and insures the sufficiently high brightness of the electron beam image projected on a target.