Patents Assigned to Volex plc
  • Patent number: 10224678
    Abstract: An electrical plug comprises at least one temperature sensor for monitoring temperature of the electrical plug. The electrical plug further comprises a data cable that is wrapped by a shield for screening electrical noise so as to accurately capture and convey temperature data. The electrical plug further comprises a housing for receiving the at least one temperature sensor, wherein the housing is capable of being embedded in the electrical plug.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: March 5, 2019
    Assignee: VOLEX PLC
    Inventors: ZhiQing Chen, ChangChun Zhao, Mui Lian Jessica Toh
  • Patent number: 10122121
    Abstract: A connector is configured to be removably engaged with and locked to an inlet. The connector comprises a locking member and a release member. The locking member is configured to impose a force on an inlet blade so as to lock the connector to the inlet when the connector is fully inserted into the inlet. The locking member comprises a compressible portion having an opening that is sufficiently large to allow the inlet blade to slide through under pressure but sufficiently small to form at least one contact point between the inlet blade and the compressible portion in its uncompressed state so as to impose the force on the inlet blade. The release member is configured to release the force imposed by the locking member on the inlet blade so as to disengage the connector from the inlet.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: November 6, 2018
    Assignee: VOLEX PLC
    Inventors: Mui Lian Jessica Toh, Kar Boon Chua
  • Patent number: 10014627
    Abstract: An assembly comprises a connector and a sleeve. The connector includes a resilient locking member movable between an outwardly disposed locked position and an inwardly disposed unlocked position. The resilient locking member includes a button portion and a locking projection. A sleeve includes an aperture capable of engaging with the button portion of the resilient locking member. The sleeve is capable of sliding along the body of the connector and pushing down the button portion to unlock the resilient locking member so as to disengage the connector from its receptacle. The assembly further comprises a pair of stoppers provided on the sleeve and a pair of grooves provided on the connector. The pair of stoppers is engagable with the corresponding pair of grooves so that the connector is pulled out from the receptacle when a user continues to pull the sleeve backward after unlocking the resilient locking member.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: July 3, 2018
    Assignee: VOLEX PLC
    Inventors: Mui Lian Jessica Toh, Boon Leng Lim
  • Patent number: 9413106
    Abstract: A coupler including a housing is configured to affix individual lines of a multiline cable within the housing, the housing including a front portion for engaging an inlet, a rear portion, and an upper portion including a raised central area and at least one lowered side area. A sliding lock including a lock housing is configured to slide over the raised central area and the at least one lowered side area and at least one spring arm affixed to the lock housing; and an outer mold configured to engage the rear portion of the housing and constrain the sliding lock within a gap formed between the housing and the outer mold. The sliding lock is configured to slide forward within the gap to engage the inlet and lock the sliding lock in place, thereby locking the connector to the inlet, and slide backward within the gap and disengage the inlet.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: August 9, 2016
    Assignee: Volex plc
    Inventors: Yun Jaan See, Mui Lian Jessica Toh
  • Patent number: 9140852
    Abstract: An optical system including an array of photonic devices that convert light signals to electrical signals or electrical signals to light signals are coupled together and optically coupled to an array of optic fibers of an information channel. A lens couples optical beams generated to at least one array of photonic devices and the array of optic fibers for an optical communication there-between. The array of photonic devices and the array of optic fibers are respectively arranged in a honeycomb configuration.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: September 22, 2015
    Assignee: VOLEX PLC
    Inventor: Benoit Sevigny
  • Patent number: 9088357
    Abstract: Methods and systems for facilitating alignment of optical systems and optoelectronic systems are disclosed here. The methods and systems include passively detecting images, determining relative positions of components and aligning components. An imaging component can detect images and determine relative positions and repositioning instructions.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: July 21, 2015
    Assignees: APPLIED MICRO CIRCUITS CORPORATION, VOLEX PLC
    Inventors: Benoit Sevigny, Ezra Gold
  • Patent number: 9033745
    Abstract: An apparatus including top and bottom portions that when mated form a connector. The top portion includes a top connector portion including a first wall, a second wall opposite the first wall, a first top cap connecting the first and second walls, and wherein the first wall comprises a first concave/convex feature for interlocking. The bottom portion includes a bottom connector portion configured to mate with the top connector portion to form the connector. The bottom connector portion includes a third wall, a fourth wall opposite the third wall, a first bottom connecting the third wall and the fourth wall, and wherein the third wall includes a second concave/convex feature for interlocking with the first concave/convex feature, wherein the second concave/convex feature is oriented opposite the first concave/convex feature.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: May 19, 2015
    Assignees: APPLIED MIRCO CIRCUITS CORPORATION, VOLEX PLC
    Inventor: Dushko Kesiakov
  • Patent number: 8917997
    Abstract: An optical system and method disclosed include a first lens component and a second lens component within the receive path or the transmit path. The first lens component includes at least two aspheric surfaces that oppose one another and generate a collimated beam channel. The second lens component generates a converging beam and magnifies the converging beam with a magnification factor that is different from a magnification factor in the other path, either the receive path or the transmit path. The receive path and the transmit path include symmetrical lengths and asymmetrical magnification factors.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: December 23, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventor: Benoit Sevigny
  • Patent number: 8906728
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: December 9, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Publication number: 20140209801
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Application
    Filed: February 3, 2014
    Publication date: July 31, 2014
    Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATION
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Patent number: 8766165
    Abstract: A pattern method is provided for testing an optical lens. The method provides a lens for test, including a first lens surface with a focal plane in object space and a second lens surface with a focal plane in image space. Also provided is a pattern test fixture including an imaging device and a target pattern. The lens is positioned so that the imaging device is located outside the object space focal plane and the target pattern located is outside the image space focal plane. The imaging device, such as a microscope, magnification device, human eye, or camera, is used to view the target pattern. A viewed image representation of the target pattern is received in the imaging device and compared to the target pattern. More typically, the viewed image representation is compared to a target pattern copy.
    Type: Grant
    Filed: February 19, 2011
    Date of Patent: July 1, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Igor Zhovnirovsky, Subhash Roy
  • Patent number: 8748797
    Abstract: A method is provided for demultiplexing optical signals. A first photodiode accepts first optical signals in a first range of wavelengths with second optical signals in a second range of wavelengths greater than the first range. First electrical signals are generated in the first photodiode in response to the first optical signals. A second photodiode accepts the second optical signals, and generates second electrical signals in response to the second optical signals. The first photodiode substantially absorbs photons associated with the first optical signal, and substantially passes photons associated with the second optical signals. In one aspect, the first photodiode has a first coefficient of absorption associated with the first range of wavelengths and the second photodiode has a second coefficient of absorption and a half value layer (HVL) associated with the second range of wavelengths. The first photodiode has thickness less than the HVL of the second photodiode.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: June 10, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Patrick Decker, Subhash Roy, Igor Zhovnirovsky
  • Publication number: 20140147945
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Application
    Filed: February 3, 2014
    Publication date: May 29, 2014
    Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATION
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Publication number: 20140115886
    Abstract: A method and system for pre-marking a substrate to provide a visual reference enabling repetitive and accurate component placement on one or more substrates. The method for marking includes determining a first location on a substrate for placing a component relative to a cut outline of the substrate. The method includes placing a fiducial at a second location on the substrate to provide a known dimensional reference to the first location, such that the fiducial and the first location are configured to be in a field-of-view of a component placement machine.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 1, 2014
    Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATION
    Inventor: Benoit SEVIGNY
  • Publication number: 20140093250
    Abstract: Methods and systems for facilitating alignment of optical systems and optoelectronic systems are disclosed here. The methods and systems include passively detecting images, determining relative positions of components and aligning components. An imaging component can detect images and determine relative positions and repositioning instructions.
    Type: Application
    Filed: October 26, 2012
    Publication date: April 3, 2014
    Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATION
    Inventors: Benoit Sevigny, Ezra Gold
  • Publication number: 20140082935
    Abstract: A method for placing components on a substrate, the method comprising determining a reference point of a mechanical holding jig based upon a plurality of mechanical features of the mechanical holding jig and placing the substrate into the jig such that mechanical features on the substrate align with the mechanical features on the mechanical holding jig. A location of the substrate is determined with the reference point of the mechanical holding jig. The method continues by installing a plurality of first components onto the substrate aligned to the mechanical holding jig. The substrate is removed from the mechanical holding jig and a second component is placed onto the substrate to cover the plurality of first components. The second component is placed onto the substrate to align a plurality of references points of the second component to the mechanical features on the substrate. The second component is secured to the substrate.
    Type: Application
    Filed: October 22, 2012
    Publication date: March 27, 2014
    Applicants: VOLEX PLC, APPLIED MICRO CIRCUITS CORPORATION
    Inventors: Ezra Gold, Subhash Roy, Igor Zhovnirnovsky
  • Patent number: 8680639
    Abstract: A photodetector with a bandwidth-tuned cell structure is provided. The photodetector is fabricated from a semiconductor substrate that is heavily doped with a first dopant. A plurality of adjoining cavities is formed in the semiconductor substrate having shared cell walls. A semiconductor well is formed in each cavity, moderately doped with a second dopant opposite in polarity to the first dopant. A layer of oxide is grown overlying the semiconductor wells and an annealing process is performed. Then, metal pillars are formed that extend into each semiconductor well having a central axis aligned with an optical path. A first electrode is connected to the metal pillar of each cell, and a second electrode connected to the semiconductor substrate. The capacitance between the first and second electrodes decreases in response to forming an increased number of semiconductor wells with a reduced diameter, and forming metal pillars with a reduced diameter.
    Type: Grant
    Filed: January 23, 2012
    Date of Patent: March 25, 2014
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventors: Subhash Roy, Igor Zhovnirovsky, Sergey Vinogradov
  • Publication number: 20130196548
    Abstract: Embodiments relate to a C5/C6 coupler having a substantially equivalent shape and size as a C7/C8 coupler. Embodiments relate to a power supply cord that provides an earth connection to the cord. Still more particularly, embodiments relate to a slim inlet that provides a make-first-and-break-last earth connection and prevents incompatible cords, different type of connectors, from being connected to the slim inlet.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Applicant: Volex plc
    Inventors: YuanWen Mo, Mui Lian Jessica Toh
  • Patent number: 8491332
    Abstract: Embodiments relate to a C5/C6 coupler having a substantially equivalent shape and size as a C7/C8 coupler. Embodiments relate to a power supply cord that provides an earth connection to the cord. Still more particularly, embodiments relate to a slim inlet that provides a make-first-and-break-last earth connection and prevents incompatible cords, different type of connectors, from being connected to the slim inlet.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: July 23, 2013
    Assignee: Volex PLC
    Inventors: YuanWen Mo, Mui Lian Jessica Toh
  • Patent number: 8492175
    Abstract: A method is provided for assembling a stack of surface-mount devices (SMDs) on a substrate. The method provides a substrate, die, or printed circuit board (PCB) with a top surface having a landing pad and a first reference feature. An alignment jig is placed overlying the substrate top surface. The alignment jig second reference feature is aligned with respect to the substrate first reference feature. A first SMD is placed overlying the substrate landing pad. The first SMD third reference feature is aligned with respect to the alignment jig second reference feature. A second SMD is placed overlying the substrate top surface. Then, the alignment jig first boundary feature is mated with the second SMD second boundary feature. In response to the mating, the second SMD first interface is aligned over an underlying SMD active element.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: July 23, 2013
    Assignees: Applied Micro Circuits Corporation, Volex PLC
    Inventor: Robert James Fanfelle