Patents Assigned to VRAM Technologies, LLC
  • Patent number: 6667237
    Abstract: A process of forming fine repetitive geometries using a mask having large mask dimensions. The pitch of the masking pattern on the mask is divided by the process to obtain a smaller pitch in the fine repetitive geometries. At least two working materials are used one of which can be etched without etching a substrate. In one embodiment the two working materials and the substrate are each etched independently. In other embodiments, the substrate and one working material have similar etch rates while the other material is etched independently. Pedestals are formed having an initial pitch. First sidewalls are formed around the pedestals. The pedestals are removed and a second and third sidewall are formed on the inside and outside surfaces of the first sidewall having spaces there-between. The first sidewall is removed generating another space between the second and third sidewall.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: December 23, 2003
    Assignee: VRAM Technologies, LLC
    Inventor: Richard A. Metzler
  • Patent number: 6580150
    Abstract: Semiconductor diodes are diode connected vertical cylindrical field effect devices having one diode terminal as the common connection between a gate and a source/drain of the vertical cylindrical field effect devices. Methods of forming the diode connected vertical cylindrical field effect devices are disclosed.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: June 17, 2003
    Assignee: VRAM Technologies, LLC
    Inventor: Richard A. Metzler
  • Patent number: 6537921
    Abstract: The present invention includes methods and apparatus as described in the claims. Briefly, semiconductor diodes having a low forward conduction voltage drop, a low reverse leakage current, a high voltage capability and avalanche energy capability, suitable for use in integrated circuits as well as for discrete devices are disclosed. The semiconductor diodes are diode configured vertical cylindrical metal oxide semiconductor field effect devices having one diode terminal as the common connection between the gates and drains of the vertical cylindrical metal oxide semiconductor field effect devices, and one diode terminal as the common connection with the sources of the vertical cylindrical metal oxide semiconductor field effect devices. The method of manufacturing the vertical cylindrical metal oxide semiconductor field effect devices is disclosed. Various device terminations can be employed to complete the diode devices. Various embodiments are disclosed.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: March 25, 2003
    Assignee: VRAM Technologies, LLC
    Inventor: Richard A. Metzler
  • Patent number: 6433370
    Abstract: Semiconductor diodes are diode connected cylindrical junction field effect devices having one diode terminal as the common connection between a top gate, a back gate and a first channel terminal of the cylindrical junction field effect devices. The second diode terminal of the semiconductor diodes being the second channel terminal of the diode connected cylindrical junction field effect devices. The method of processing the cylindrical junction field effect devices provide very short channels, shallow diffused regions and trench terminated junctions at the edges of the active device for low forward voltage turn-on and high reverse bias breakdown. The trench terminated junctions spread the breakdown energy over the entire active device region rather than just device edges.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: August 13, 2002
    Assignee: VRAM Technologies, LLC
    Inventor: Richard A. Metzler
  • Patent number: 6420757
    Abstract: Semiconductor diodes are diode connected cylindrical field effect transistors having one diode terminal as the common connection between the gate and the drain of the cylindrical field effect transistors. The method of processing the field effect transistor provides very short channels, shallow diffused regions and trench terminated junctions at the edges of the active device. The trench terminated junctions are formed out of a vertical etch cut through the P-N junction at the edge of the device forming the trench which is then passivated with a dielectric material to provide a region of higher breakdown voltage at the edge of the device than is seen within the active device area. The trench terminated junction results in spreading the breakdown energy over the entire active device region rather than just device edges. The preferred fabrication technique for the active device uses two masks and two masking steps, without any critical mask alignment requirements.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: July 16, 2002
    Assignee: VRAM Technologies, LLC
    Inventor: Richard Metzler