Patents Assigned to Vsesojuzny Elektrotekhnichesky Institut
  • Patent number: 4471301
    Abstract: A device for monitoring thyristors of a high-voltage valve comprises thyristor voltage detectors coupled via light guides to a buffer storage unit through a selector. Also provided are an OR gate assembly, an adder, a memory unit, and a comparison unit, which are placed in series and coupled to a control unit. The OR gate assembly is connected to the buffer storage unit which is also coupled to the control unit. A second input of the comparison unit is connected to a second output of the adder, while its output is connected to an indicator signalling the quantity of disabled thyristors and to a unit protecting the high-voltage valve against breakdown. The selector is also connected to an indicator signalling the numbers of disabled thyristors.
    Type: Grant
    Filed: December 11, 1981
    Date of Patent: September 11, 1984
    Assignee: Vsesojuzny Elektrotekhnichesky Institut
    Inventors: Jury N. Durov, Nikolai A. Fomin, Rem A. Lytaev, Arkady I. Yanvarev, Tamara I. Ivannikova
  • Patent number: 4208707
    Abstract: A method for control of a static valve converter consists of determining the difference between the actual and desired control pulse phases by the use of an equidistant pulse sequence, the frequency of which being equal to the coversion frequency, the pulse sequence phase being selected so that the mean difference between the equidistant pulse phase and the phase of the respective control pulses of all valves is equal to zero, and the pulse phase difference being determined for each individual valve. A control pulse automatic balancing unit incorporated in an apparatus for realizing the method of the present invention comprises an equidistant pulse sequence assembly, a shaping element, correcting signal circuits and logical AND elements equal in number to the number of conversion phases, and also logical circuits equal in number to the number of coversion phases. Each logical circuit comprises two logical AND elements, and a logical OR element connected to the outputs of the AND elements.
    Type: Grant
    Filed: January 24, 1978
    Date of Patent: June 17, 1980
    Assignee: Vsesojuzny Elektrotekhnichesky Institut Imeni V. I. Lenina
    Inventors: Mikhail V. Olshvang, Grigory M. Tsfasman, Alexei A. Sheremet