Patents Assigned to VSYNC Circuits Ltd.
  • Constraining VLSI circuits
    Patent number: 8631364
    Abstract: A method of circuit design performed in which a description of a multi-clock-domain circuit is analyzed to locate clock domain crossings. A processor automatically identifies, for at least one of the located clock domain crossings, one or more elements of a synchronization circuit of the clock domain crossing, which require constraining. The processor then generates a constraint for implementation of the identified one or more elements in a design of the circuit.
    Type: Grant
    Filed: December 26, 2011
    Date of Patent: January 14, 2014
    Assignee: VSYNC Circuits Ltd.
    Inventors: Rostislav (Reuven) Dobkin, Leonid Brook