Patents Assigned to Vtech Computers, Ltd.
  • Cache control apparatus and method with pipelined, burst read
    Patent number: 5416739
    Abstract: A cache memory controller capable of servicing pipelined multi-word read memory requests issued by a processor wherein requested data if found to be within a cache memory is bursted to the processor and wherein the servicing of a second pipelined multi-word read memory request issued by the processor overlaps in time with the servicing of a first pipelined multi-word read memory request.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: May 16, 1995
    Assignee: Vtech Computers, Ltd.
    Inventor: Kenneth K. F. Wong