Patents Assigned to Vtera Technology Inc.
  • Patent number: 6914315
    Abstract: The present invention relates to a GaN-based heterostructure photodiode comprising a P type layer, an N type layer, and an activity layer between the P type layer and the N type layer. The P type layer, the N type layer and the activity layer are made of GaN-based composition, and the activity layer is doped with borons so as to modulate the band gap between the P type layer and the N type layer. Therefore, the breakdown voltage can be increased and the light receiving ability can be promoted so that the photodiode to be a light receiving element can has a better performance for light detection.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: July 5, 2005
    Assignee: Vtera Technology Inc.
    Inventors: Mu-Jen Lai, Chiung-Yu Chang
  • Patent number: 6825498
    Abstract: The present invention discloses a light emitting diode (LED) by using a P-type ZnTe layer or a ZnSe layer as a substrate. To match the lattice between the substrate and blue light LED of cubic crystal, a BP(boron phosphide) buffer layer of single crystal is formed on the substrate. When the blue light LED emits blue light of wavelength from 450 nm to 470 nm, the ZnTe or ZnSe substrate absorbs the blue light and emits yellow-green light of wavelength 550 nm. Thus, white light is produced by mixing the blue light and the yellow-green light.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: November 30, 2004
    Assignee: Vtera Technology Inc.
    Inventors: Mu-Jen Lai, Chia-Cheng Liu, Chiung-Yu Chang
  • Patent number: 6787828
    Abstract: The invention provides a method of manufacturing an optical-gate transistor. A BP buffer layer is formed on a silicone substrate first, and a first AIN layer is then formed for offsetting strain in the layers deposited on the first AIN layer. Subsequently, a GaN layer and an n-type AIN layer are successively deposited to form a hetero-junction at the interface. A selective epitaxy or anisotropic etching of a GaN-group material is conducted to form a prism-shaped, light-receiving layer with a cubic lattice. The prism-shaped, light-receiving layer focuses incident light to induce electrons in the n-type AIN layer, which then form a high-speed 2DEG in the GaN layer, thereby increasing the power and sensitivity of the transistor being controlled by illumination.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: September 7, 2004
    Assignee: Vtera Technology Inc.
    Inventors: Terashima Kazutaka, Shun-Hung Hsu, Chiung-Yu Chang, Mu-Jen Lai