Abstract: A knowledge based system uses a protocol analyzer which acquires real time statistical data on network signal traffic in a monitoring session and reports a session performance history as a real time composite of measured statistics and analysis-derived statistics, together with a real time report of discarded frames.

Abstract: An expert network analysis system includes multiple phases which offer a user the ability, at the user's option, to establish pretest conditions through a prompted interview which focuses the performance conditions to be analyzed and which allows the expert system to rank the analyzed results in importance with respect to their relationship to the user established conditions

Abstract: An interfacing device having two operational amplifiers that have been manufactured on the same IC die have high-impedance input terminals connected directly to the two conductors of a local area network digital transmission line so as not to load or otherwise upset the impedance or other parameters of the transmission line. The output terminals of the operational amplifiers are connected to and match the input impedance of a digital transmission protocol analyzer. The gain of the operational amplifiers is arranged so as to replicate at the input of the analyzer the signals appearing on the local area network transmission line.

Abstract: A new and improved protocol analyzer for monitoring digital transmission networks is disclosed. The protocol analyzer of the present invention is capable of displaying station level statistics, network statistics, real-time event information, and protocol distribution. The protocol analyzer of the present invention is additionally capable of creating baseline network performance information and displaying the baseline information simultaneously with real-time performance information, pre-programming monitoring sessions, and generating presentation-quality reports in conjunction with analyzing digital transmission networks, all in real time.

Abstract: A new and improved protocol analyzer for monitoring digital transmission networks is disclosed. The protocol analyzer of the present invention is capable of displaying station level statistics, network statistics, real-time event information, and protocol distribution. The protocol analyzer of the present invention is additionally capable of creating baseline network performance information and displaying the baseline information simultaneously with real-time performance information, pre-programming monitoring sessions, and generating presentation-quality reports in conjunction with analyzing digital transmission networks, all in real time.

Abstract: To recognize a specific pattern of bits anywhere within a high-speed bit stream of data, the serially-received bytes of the bit stream are first converted to parallel or simultaneously-presented, eight-bit bytes. Received bytes are used as the addresses of two SRAMs. A byte of the desired pattern is recognized by having that byte address a memory location of one of the SRAMs in which a binary "1" has been stored at the bit location within that memory location that corresponds to the received byte's position within the expected bit pattern. The other seven bit locations within that memory byte have binary "0s" stored in them. The outputs from the two SRAMs are gated to look for a sequence of two successive bytes of the expected pattern. A binary "1," signifying recognition of receipt of two successive bytes, is clocked into one of a plurality of shift registers. The length of each shift register represents the opposite of the position, within the expected sequence pattern, of the two successive bytes.

Abstract: A plurality of digital transmission network analyzers are arranged to analyze and compare the appearance of a data packet on the plurality of ports of a network. Each analyzer has its own internal clock for time stamping of data packets in addition to other internal timing purposes. In order to synchronize the time stamping of the packet as it appears to each analyzer at a each different port, the clock outputs of the several analyzers are connected together; and a controlling CPU commands one of the analyzers to supply the master clock to the others. That master analyzer then commands the other analyzers to disable or disconnect their own clocks, thereby all of the analyzers involved in a given test are under timing control of the clock of the master analyzer. Packet headers and time stamps are transmitted between analyzers for comparison, analysis, and reporting to the controlling CPU.

Abstract: A plurality of digital transmission network analyzers are arranged to analyze and compare the appearance of a data packet on the plurality of ports of a network. Each analyzer has its own internal clock for time stamping of data packets in addition to other internal timing purposes. In order to synchronize the time stamping of the packet as it appears to each analyzer at a each different port, the clock outputs of the several analyzers are connected together; and a controlling CPU commands one of the analyzers to supply the master clock to the others. That master analyzer then commands the other analyzers to disable or disconnect their own clocks, thereby all of the analyzers involved in a given test are under timing control of the clock of the master analyzer. Packet headers and time stamps are transmitted between analyzers for comparison, analysis, and reporting to the controlling CPU.