Abstract: Signal processors for permitting the transparent, simultaneous transmission and reception of a volume of information in the video bandwidth is disclosed. The volume of data is selected in response to receiving a signal at a transmitter site. The signal processor in the transmitter rasterizes the volume of information at the horizontal scanning rate and modulates the volume of information with a data carrier at a non-integral multiple of the horizontal scanning rate to provide a frequency interleaved combined signal. The combined signal is transmitted during the active video portion of each video line.

Abstract: Embodiments of methods and apparatuses for removing ghosts from a signal such as a communications signal received over a channel where the output symbol pattern is used for selecting correction factors for correcting the received symbols. The correction factor is added to the sampled symbols and the sampled symbol is compared with a selected one of a plurality of thresholds based upon the closeness of the various thresholds to a sequence of the corrected symbol values. That comparison forms the basis for the next output symbol in the output sequence. Further, the selected correction factor is updated by taking the difference between the selected correction factor and an error measurement between the corrected sample value and the nominal value of the symbol times a damping factor. At various points in the sequence, the output is forced to an expected symbol sequence such as a clocking sequence used for clock recovery.

Abstract: An improved tuner for recovery of data having a data bandwidth embedded in a video signal transmitted in association with a video carrier frequency is disclosed. The entire video signal is shifted to the intermediate frequency bandwidth, thereby shifting the data bandwidth to an IF data bandwidth. The IF data bandwidth is then filtered to block as much of the spectrum of the IF signal that is outside of the IF data bandwidth. The filtered IF data bandwidth is then demodulated again using an IF carrier generated by a local oscillator that tracks frequency drift in the carrier.

Abstract: A tuner specifically adapted for recovery of a data signal injected into a video signal and then subsequently transmitted over a television channel or cable is disclosed. The tuner includes an IF local oscillator that is phase locked to the input signal sync pulses and has filters that are designed to pass through only the data bandwidth. In addition, the circuit has a low noise figure of about 1.5 dB and a third order intercept point of +35 dBm.

Abstract: The instant application is directed to a cable facsimile machine which implements the upper vestigial chrominance sideband of a standard video signal for data transmission.Signal processors for permitting the transparent, simultaneous transmission and reception of a data signal in the video bandwidth is disclosed. The signal processor in the transmitter rasterizes the data at the horizontal scanning rate and modulates the data with a data carrier at a non-integral multiple of the horizontal scanning rate to obtain frequency interleaving. The data is transmitted during the active video portion of each video line.

Abstract: A controlled element for spectrum attenuation or a controlled filter is disclosed that is used to aid in the insertion of a secondary signal into a video signal without distorting the blanking intervals or close captioned data contained in the blanking interval of the video signal.

Abstract: Signal processors for permitting the transparent, simultaneous transmission and reception of a data signal in the video bandwidth is disclosed. The signal processor in the transmitter rasterizes the data at the horizontal scanning rate and modulates the data with a data carrier at a non-integral multiple of the horizontal scanning rate to obtain frequency interleaving. The data is transmitted during the active video portion of each video line.

Abstract: Signal processors for permitting the transparent reception of a data signal in the video bandwidth of a cable television system is disclosed. The received signal has video and data components that are frequency interleaved in the video bandwidth in the active video intervals. The data signal is modulated with a carrier at a non-integral multiple of the horizontal scanning rate of the video signal. The receiver selects a forward channel transmitting the combined signal responsive to a control signal and extracts the data portion of the transmitted combined signal.

Abstract: A secondary signal is processed and injected into a primary video signal. The injection level of the secondary signal is dynamically controlled to reduce transmission errors in the secondary signal, and to minimize interference and power level limitations. The injection level of the secondary signal may be based on video analysis of the primary signal or on error information fed back from a receiver which receives the transmitted secondary signal.

Abstract: Signal processors for permitting the transparent, simultaneous transmission and reception of a secondary data signal with a video signal in the video band is disclosed. The signal processor in the transmitter rasterizes the data at the horizontal scanning rate and modulates the data with a data carrier at a non-integral multiple of the horizontal scanning rate to obtain frequency interleaving. The data is transmitted during the active video portion of each video line.

Abstract: A delta modulator automatically adjusting the slewing rate is disclosed. In the absence of a transition in the output data of a delta modulator, a parameter used for the integrator of the delta modulator is increased. When the comparator of the modulator indicates that the feedback signal of the modulator has overshot the input signal, the parameter is decreased or reversed until the two signals are approximately equal as signalled by a 50% duty cycle.

Abstract: A secondary signal is processed and injected into a primary color video signal. The timing of the subsequent transmission of the secondary signal is controlled by timing signals. The timing signals also control the transmission of a carrier burst prior to the transmission of the secondary data signal. This carrier burst is used by a receiver to synchronize with the transmitter, reduce transmission errors and to indicate that a data transmission is to follow.

Abstract: Signal processors for permitting the transparent, simultaneous transmission and reception of a data signal in the video bandwidth is disclosed. The signal processor in the transmitter rasterizes the data at the horizontal scanning rate and modulates the data with a data carrier at a non-integral multiple of the horizontal scanning rate to obtain frequency interleaving. The data is transmitted during the active video portion of each video line.

Abstract: Signal processors for permitting the transparent, simultaneous transmission and reception of a secondary data signal with a video signal in the video band is disclosed. The signal processor in the transmitter rasterizes the data at the horizontal scanning rate and modulates the data with a data carrier at a non-integral multiple of the horizontal scanning rate to obtain frequency interleaving. The data is transmitted during the active video portion of each video line.

Abstract: A delta modulator automatically adjusting the slewing rate is disclosed. In the absence of a transition in the output data of a delta modulator, the current used for the integrator of the delta modulator is increased. When the comparator of the modulator indicates that the feedback signal of the modulator has overshot the input signal, the current is decreased or reversed until the two signals are approximately equal as signalled by a 50% duty cycle.

Abstract: A new method of modulating and demodulating signals and circuitry therefor is disclosed. The modulation circuit defines a non-linear voltage current transfer function wherein at low voltage levels the current voltage transfer function is substantially linear and at higher voltages, the transfer function is substantially exponential. The modulation circuit can be designed of three parallel branches, a resistive branch, and two diodes in the remaining branches, the anode of one diode being coupled to the cathode of the other diode. Demodulation circuitry is also disclosed that includes a circuit for determining the instantaneous phase and amplitude and then processing circuitry to decode the modulation information based upon the sampled phase and amplitude data.

Abstract: A bandwidth compression and expansion system is provided in which analog data is processed in real time using a sub-sampling technique in which pixels or other data values within a sub-sampling region determine the value of a corresponding signal which also denotes trends or patterns in accordance with the other pixels or signal values within a sampling region encompassing the sub-sampling region. Neural networks are used to implement the sub-sampling process both during bandwidth compression and during bandwidth expansion in which interpolation and extrapolation are employed to reverse the sub-sampling process used during compression. The neural network forms part of an arrangement in which analog input signals are converted to digital signals that are then stored in a random access memory which operates in conjunction with an address generator for identifying a succession of sampling and sub-sampling regions within the memory.

Abstract: Improved analog to digital and digital to analog signal processors are disclosed wherein a quick approximation of the input signal to the signal processor is attained and a more accurate approximation is later attained for the input signal. For the analog to digital conversion, a standard analog to digital converter having a finite resolution or a predetermined quantization error is used to create part of the digital representation. The remainder of digital representation is created by processing an error signal due to the finite resolution of a standard analog to digital converter and the infinite resolution of the analog input signal to a delta modulator. In a digital to analog signal processing circuit, the first part of the digital representation is converted by a standard digital to analog converter and the remaining portion is integrated into a frequency limited analog signal and then summed to reconstruct the analog signal.