Patents Assigned to WAVEPIA CO., LTD.
  • Publication number: 20260136650
    Abstract: A semiconductor device according to one embodiment of the present invention includes a semiconductor substrate, transistors disposed on the semiconductor substrate, gate pads disposed on the semiconductor substrate and disposed at the outside of the transistors, resistors disposed on the semiconductor substrate and electrically connected to at least one of the gate pads, and upper metal layers disposed on the semiconductor substrate and configured to come into contact with the resistors. At least one of the gate pads is electrically connected to a gate electrode of each of the transistors, the gate pads are spaced apart from each other, and at least one of the resistors is an anti-resonance resistor, which is configured to suppress resonance generated by operation of the transistors, is disposed between two gate pads, and is electrically connected to at least one gate pad of the two gate pads through the upper metal layer.
    Type: Application
    Filed: January 8, 2026
    Publication date: May 14, 2026
    Applicant: WAVEPIA CO., LTD.
    Inventor: Sang Hun LEE
  • Publication number: 20260107765
    Abstract: The present invention relates to a semiconductor device. The semiconductor device of the present invention includes a semiconductor substrate, a semiconductor layer disposed on the semiconductor substrate, a plurality of resistors disposed in the semiconductor layer, at least one electrode layer disposed on the semiconductor layer, and a first temperature measurement pad, a second temperature measurement pad, and a third temperature measurement pad that are disposed on the semiconductor layer, wherein the plurality of resistors are electrically connected to at least one of the first temperature measurement pad, the second temperature measurement pad, and the third temperature measurement pad, and heat is transferred to the plurality of resistors through the semiconductor layer, thereby allowing measurement of temperatures of the semiconductor layer and the highest-temperature heat source of the semiconductor device based on resistance values of the plurality of resistors.
    Type: Application
    Filed: July 16, 2025
    Publication date: April 16, 2026
    Applicant: WAVEPIA CO., LTD.
    Inventors: Sang Hun LEE, Sang Yeol LEE, Sang Su KIM
  • Publication number: 20260056241
    Abstract: The present invention relates to a method and apparatus for evaluating the degree of degradation of an active region of a transistor. The method of evaluating the degree of degradation of the active region of the transistor includes measuring a first resistance of a resistor unit that receives heat generated in an active region of a transistor disposed on a semiconductor device, heating the semiconductor device, measuring a second resistance of the resistor unit, repeatedly performing the measuring of the first resistance, the heating of the semiconductor device and the measuring of the second resistance after a predetermined period of time, and evaluating the degree of degradation of the active region based on a plurality of measured first resistances and a plurality of measured second resistances.
    Type: Application
    Filed: July 17, 2025
    Publication date: February 26, 2026
    Applicant: WAVEPIA CO., LTD.
    Inventors: Sang Hun LEE, Sang Yeol LEE, Sang Su KIM
  • Publication number: 20260060071
    Abstract: The present disclosure relates to a semiconductor device. A semiconductor device according to one embodiment of the present disclosure includes a lower metal layer, a substrate disposed on the lower metal layer, at least one transistor disposed on the substrate, an insulating layer disposed on the substrate and configured to cover the at least one transistor, an upper metal layer disposed on the insulating layer, a first via which includes a material having thermal conductivity, and a second via which includes a material having thermal conductivity, wherein a source electrode of the at least one transistor is connected to the lower metal layer through the first via and is connected to the upper metal layer through the second via.
    Type: Application
    Filed: May 28, 2025
    Publication date: February 26, 2026
    Applicant: WAVEPIA CO., LTD.
    Inventors: Sang Hun LEE, Sang Yeol LEE, Sang Su KIM
  • Patent number: 12525552
    Abstract: A radio frequency (RF) chip package includes: an RF die; a first peripheral circuit chip; a second peripheral circuit chip; a substrate having a -shaped step formed on a portion thereof so that the RF die is mounted on top of the step of the substrate and the first peripheral circuit chip and the second peripheral circuit chip are mounted on top of the substrate where no step is formed; a first mutual inductance controller for controlling the dimension of the mutual inductance between the first peripheral circuit chip and the RF die; and a second mutual inductance controller for controlling the dimension of the mutual inductance between the second peripheral circuit chip and the RF die.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: January 13, 2026
    Assignee: WAVEPIA CO., LTD.
    Inventors: Sang-Hun Lee, Sang-Yeol Lee, Sang-Soo Kim
  • Publication number: 20250006581
    Abstract: The present invention relates to a semiconductor device. A semiconductor device, according to the present invention, comprises: a semiconductor substrate; an active layer disposed on the semiconductor substrate; a transistor disposed on the active layer, and at least one temperature-measuring sensor disposed on a partial region of the active layer. Therein: the transistor comprises a drain electrode, a source electrode and a gate electrode, disposed on the semiconductor substrate; and the active layer comprises a channel region formed between the source electrode and the drain electrode on the top of the semiconductor substrate.
    Type: Application
    Filed: September 13, 2024
    Publication date: January 2, 2025
    Applicant: WAVEPIA CO., LTD.
    Inventor: Sang Hun LEE
  • Publication number: 20230369159
    Abstract: The present invention relates to a semiconductor device. The semiconductor device according to an embodiment of the present invention includes a semiconductor substrate, a lower metal layer disposed under the semiconductor substrate and grounded, at least one transistor disposed on an upper portion of the semiconductor substrate, and at least one first through-via configured to pass through the semiconductor substrate and connected to the lower metal layer, wherein the transistor includes a gate electrode, a source electrode, and a drain electrode that are disposed on the semiconductor substrate, an inside of the at least one first through-via is filled with a conductive material, and the conductive material is electrically connected to the lower metal layer, and the at least one first through-via transfers heat generated in the transistor downward from the semiconductor substrate.
    Type: Application
    Filed: June 13, 2023
    Publication date: November 16, 2023
    Applicant: WAVEPIA CO., LTD.
    Inventor: Sang Hun LEE
  • Publication number: 20230369319
    Abstract: The present disclosure relates to a semiconductor device that includes a semiconductor substrate, a plurality of transistors disposed on the semiconductor substrate and each transistor including a gate electrode, a source electrode, and a drain electrode, a plurality of pads disposed on the semiconductor substrate and disposed at the outside of the plurality of transistors, a plurality of resistors disposed on the semiconductor substrate and electrically connected to the plurality of pads, respectively, and a plurality of upper metal layers disposed on the semiconductor substrate and configured to come into contact with the resistors. At least one of the plurality of resistors is an anti-resonance resistor that is disposed between two gate pads and is electrically connected to at least one gate pad of the two gate pads through the upper metal layer.
    Type: Application
    Filed: December 27, 2022
    Publication date: November 16, 2023
    Applicant: WAVEPIA CO., LTD.
    Inventor: Sang Hun LEE
  • Patent number: 11695376
    Abstract: A phase-synchronized RF power generator includes: an RF power amplifier for amplifying an RF power signal; a first directional coupler; an isolator for adjusting impedance mismatch generated by the first directional coupler, and transferring the RF power signal transferred by the first directional coupler to the output terminal; a second directional coupler for transferring part of the feedback signal transferred by the first directional coupler to be compared with a frequency of a reference signal provided by a crystal oscillator, and transferring rest of the feedback signal to a feedback loop; a digital phase shifter for adjusting a phase of the feedback signal transferred by the second directional coupler at predetermined intervals; an analog phase shifter for continuously adjusting the phase of the feedback signal discretely adjusted by the digital phase shifter; and a frequency comparator.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: July 4, 2023
    Assignee: WAVEPIA CO., LTD.
    Inventor: Sang-Hun Lee
  • Patent number: 11420386
    Abstract: A nozzle structure applying an RF heating device for a 3D printer, the structure includes: a nozzle unit for melting and discharging an inflowing material using heat transferred from the outside; a transfer unit for transferring the material to the nozzle unit; an RF nozzle heating unit for heating up the nozzle unit using a high frequency so that the material is melted in the nozzle unit; and a cooling unit for cooling down the heat discharged from the nozzle unit 100 to the outside.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: August 23, 2022
    Assignee: WAVEPIA CO., LTD.
    Inventor: Sang-Hun Lee
  • Patent number: 11342250
    Abstract: A lead frame for a hermetic RF chip package includes: a first capacitor unit formed of a conductive material in a rectangular shape having a width smaller than a length to receive an input of an RF signal applied to the package circuit; a first inductor unit connected to the first capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length; a second capacitor unit connected to the first inductor unit and formed of a conductive material in a rectangular shape having a width smaller than a length; and a second inductor unit connected to the second capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length to transfer an RF signal input through the first capacitor unit to the RF chip.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: May 24, 2022
    Assignee: WAVEPIA CO., LTD.
    Inventor: Sang-Hun Lee
  • Patent number: 11309833
    Abstract: An LC oscillator capable of temperature compensation includes a differential voltage supplier providing a positive differential voltage to a positive node and a negative differential voltage to a negative node and a differential oscillation frequency signal output unit outputting a positive oscillation frequency signal using the positive differential voltage provided to the positive node by the differential voltage supplier and a negative oscillation frequency signal using the negative differential voltage provided to the negative node by the differential voltage supplier.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: April 19, 2022
    Assignee: WAVEPIA CO., LTD.
    Inventor: Sang-Hun Lee