Abstract: A housing arrangement for a plurality of semiconductor chips (1) is disclosed, in which each of the chips is received in a respective frame or cassette (4), there being a first electrically conductive member (5), having portions (6) which are in electrical connection with one face of each of the chips and a second electrically conductive member (7), having portions (8) which are in electrical connection with an opposite face of each of the chips.

Abstract: In a housing of a semiconductor device there are provided a plurality of semiconductor chips captivated in a preformed sub-assembly and arranged to present contact areas for connection to anode and emitter electrodes of the semiconductor housing. Electrically conductive contact pin arrangements project from electrically insulated channels in the preformed sub-assembly, an inward end of each of the pin arrangements being so arranged, when urged into its channel, as to provide an electrical connection to a part of the surface of a semiconductor chip. There is a sheet of electrically conductive material, resting on a base level of an inner surface of the emitter electrode and electrically isolated therefrom by an electrically insulating insert, as a means for distributing an electrical signal and making simultaneous contact with the opposite ends of the pin arrangements.

Abstract: A planar slice (1) of semiconductor substrate material of a first conductivity type is provided on one face with a first region (13a) of a second conductivity type having a higher dopant concentration than that of the substrate and on the opposite face a second region (13b) of said second conductivity type having a higher dopant concentration than that of the substrate. Each of the faces has had removed from part of it a depth of material which increases gradually as the outer edge is approached so that the junction between each of the regions (13a, 13b) and the substrate is exposed along a path following the shape of the perimeter of the slice but so that the removal of material ceases at a distance outwardly beyond the exposure of the junction to leave a rim (11) of the original planar faces of the slice at its perimeter.

Abstract: A semiconductor switching device comprises a substrate of silicon of a first conductivity type provided at a first face with a doped region of opposite conductivity type and at a second, opposite face with strips of doped material of the opposite conductivity type therein to form base regions. More highly doped segmented regions of material of the opposite conductivity type lie wholly within the lateral bounds of the strips and are aligned therewith to include in each case a first margin of width on each side towards the boundaries of a strip. Further doped regions, of material of the first conductivity type, separate the segmented regions and include in each case a second margin of width on each side towards the boundaries of a strip.