Abstract: The present disclosure generally relates to efficiently relocating data within a data storage device. By implementing an error correction code (ECC) module in a complementary metal oxide semiconductor (CMOS) chip for each memory die within a memory array of a memory device, the data can be relocated more efficiently. The ECC decodes the codewords at the memory die. The metadata is then extracted from the decoded codewords and transferred to a controller of the data storage device. A flash translation layer (FTL) module at the controller then checks whether the data is valid by comparing the received metadata to FTL tables. If the metadata indicates the data is valid, then the data is relocated.

Abstract: Aspects of a storage device including a memory and a controller are provided. The controller can receive a data stream from a host device, the data stream indicating a plurality of encryption keys associated with the data stream, and segregate the data stream into a plurality of data stream portions based on the plurality of encryption keys. The controller can encode the plurality of data stream portions into a plurality of encoded data stream portions with the plurality of encryption keys. The controller also can generate a mapping indicating an association between each of the plurality of encryption keys with a respective one of the plurality of encoded data stream portions. Thus, the controller may store the plurality of encoded data stream portions and the plurality of encryption keys in the memory based on the mapping, thereby improving security access to data stored in the storage device.

Abstract: A storage system is provided that performs a defragmentation operation or proactive garbage collection in its memory based on a command from a host. The command specifies which blocks in the memory should take part in the defragmentation operation by specifying a maximum amount of valid data that a block can have to qualify for defragmentation. That way, the storage system only performs defragmentation on those blocks that meet the validity criteria provided by the host. This can help improve performance of the storage system while reducing the degree of negative tradeoffs that may come with defragmentation or proactive garbage collection.

Abstract: Various processes for efficiently and effectively determining or predicting whether data stored in a non-volatile storage device is unreadable and/or unrecoverable during a read-retry process. To make the determination, different dynamic read threshold (DRT) entries of a dynamic read threshold (DRT) table are applied, in parallel, across different planes of the non-volatile storage device to determine whether the data is unreadable and/or unrecoverable.

Abstract: A mobile data storage device (DSD) incorporating a mobile data storage device (DSD), the mobile DSD comprising a non-volatile storage medium configured to store user data, a data path configured to transmit at least data between the mobile DSD and a host computer system, a housing having a machine readable optical code and a controller. The controller is configured to receive, from the data path, a request to restore the mobile DSD to factory settings. The controller also receives, from the data path, a unique access passcode derived from the machine readable optical code. The controller validates the unique access passcode, and, in response to determining that the unique access passcode is valid, restores the mobile DSD to factory settings.

Abstract: Example storage systems, storage devices, and methods provide proactive management of storage operations using thermal states. Host storage requests are received and used to determine storage commands for a data storage device. For each storage command, a temperature index value corresponding to an estimated change in thermal state for executing the storage command may be determined. The storage commands are allocated to command queues based on the thermal index values and then executed from the command queues by the data storage device without triggering thermal throttling of storage commands.

Abstract: Systems and methods for peer data storage device messaging over a control bus for power management are disclosed. Storage devices may include a host interface configured to connect to a host system and a control bus interface to connect to a control bus. Peer data storage devices may establish peer communication through the control bus interface, determine a power state, receive a power change indicator from a peer data storage device, and initiate a change in their power state. The peer data storage devices may manage their collective power as a power pool and increase or decrease power use without host intervention.

Abstract: The present disclosure is generally related to a magnetic recording device comprising a magnetic recording head. The magnetic recording head comprises a main pole (MP), a shield, and a spintronic device disposed between the MP and the shield. The spintronic device comprises a MP notch disposed on the MP, a first spin torque layer (STL), a second STL, a spin kill layer disposed between the first and second STLs, and a shield notch. The spin kill layer prevents spin torque from being transferred between the first STL and the second STL. In a forward stack where electrons flow from the MP to the shield, the MP notch comprises FeCr and the shield notch comprises CoFe. In a reverse stack where electrons flow from the shield to the MP, the MP notch comprises CoFe and the shield notch comprises FeCr.

Abstract: A data storage device and method for reducing read disturbs when reading redundantly-stored data are provided. In one embodiment, a data storage device is provided comprising a memory and a controller. The memory is configured to redundantly store a plurality of copies of data, wherein the plurality of copies of the data comprise a primary copy of the data and at least one secondary copy of the data. The controller is configured to randomly select one of the plurality of copies of the data instead of selecting the primary copy of the data as a default; and read, from the memory, the randomly-selected one of the plurality of copies of the data. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to segment a key to physical (K2P) table into two or more segments, wherein each segment of the two or more segments corresponds to a caching priority of key value (KV) pair data, organize the K2P table by storing and relocating one or more K2P table entries into a respective segment of the two or more segments, wherein the storing and relocating comprises moving a K2P table entry based on the caching priority of the KV pair data into the respective segment having the caching priority, and utilize the K2P table to manage KV pair data stored in the memory device, wherein utilizing the K2P table comprises applying a same management operation, such as prefetching, to each K2P table entry of a same segment.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The memory device is arranged into at least a first super device and a second super device, each of the super devices having a plurality of active zones. The controller is configured to determine that each of the super devices includes both cold zones and hot zones, where a cold zone is a zone that is overwritten less than a hot zone. The controller is further configured to move cold zones from one super device to another super device upon determining that the another super device is below a threshold limit, where the threshold limit is a minimum free space to be maintained in a super device. The controller is further configured to move cold zones between super devices, such that the cold zones are concentrated in at least one super device.

Abstract: In one example, a flash storage device includes a flash memory and a controller. The flash memory includes non-volatile memory cells organized into blocks. The blocks are switchable between multi-bit mode and single-bit mode for storing data. The blocks in single-bit mode have a lower storage density and a higher write endurance than the blocks in multi-bit mode. The controller is configured to receive a write request from a host, and to determine whether a trigger event has occurred to switch one or more of the blocks from multi-bit mode to single-bit mode. Based on the controller determining that the trigger event has occurred, the controller is further configured to switch the one or more blocks from multi-bit mode to single bit mode, and to store, in single-bit mode, data for the write request in the one or more blocks at the lower data storage density.

Abstract: The present disclosure generally relates to reducing exit latency when transitioning from non-operational power states. Before entering a non-operational power state, specific data in databases and/or tables can be identified as being recently utilized by the host device. In addition to saving the databases and/or tables, a recovery code is also stored to identify that specific data. Upon transitioning back to an operational power state, the recovery code is detected and the specific data can be recovered rather than recovering the entire database and/or table. Data not identified in the recovery code need not be recovered from always-on memory. In so doing, when transitioning back to an operational power state, the latency will be reduced compared to a situation where all data is stored in always-on memory.

Abstract: To increase the speed of programming of a multi-plane non-volatile memory, it is proposed to accelerate the programming of the last one or more data states for one or more slow planes.

Abstract: A method and system for maintaining command queue order are disclosed. According to certain embodiments, commands are read from a host, storing command queue IDs in an array that will keep the queue IDs in order. After having the queue IDs stored in the array, the commands are processed in the data storage device (DSD). After processing, the commands are provided to a completion order adjustment module that will order the commands in queue ID order for sequential commands to be returned to the host. In certain embodiments, for a sequential command, other commands of the same sequence are searched for the array and ordered with the sequential command. If a particular command of the sequence is not found, the completion order adjustment module will wait to transfer the sequence until each command of the sequence is found. For commands not part of a sequence, these commands are transferred to the host.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a read command to read data from the memory device or a write command to write data to the memory device from a host device, determine whether a bottleneck exists in a data/control path between the host device and the memory device, wherein the bottleneck exists either in an input queue corresponding to a hardware module of a plurality of hardware modules or in the hardware module of the plurality of hardware modules, and execute a bottleneck release operation when the bottleneck exists in the data/control path between the host device and the memory device, wherein the bottleneck release operation is dependent on whether the bottleneck exists in the input queue or in the hardware module.

Abstract: A magnetoresistive memory cell includes a first electrode, a second electrode that is spaced from the first electrode, a magnetic tunnel junction layer stack located between the first electrode and the second electrode, the magnetic tunnel junction layer stack containing, from one side to another, a reference layer having a fixed reference magnetization direction, a tunnel barrier layer comprising a dielectric material, and a free layer, and an asymmetric magnetoresistance layer located between the magnetic tunnel junction layer stack and one of the first electrode and the second electrode.

Abstract: Technology is disclosed herein for detecting grown bad blocks in a non-volatile storage system. A stress test may accelerate stressful conditions on the memory cells and thereby provide for early detection of grown bad blocks. The stress test may include applying a program voltage to a selected word line and a stress voltage that is less than a nominal boosting voltage to a word line adjacent one side of the selected word line. The combination of the program voltage and the stress voltage may generate an e-field that is stronger than an e-field that would be generated in a normal program operation, thereby accelerating the stress on the memory cells. The stress test mat further include programming all of the memory cells to a relatively high threshold voltage, which may create additional stress on the memory cells.

Abstract: A device may include a fluid region. A device may also include a magnetochemical sensor for detecting magnetic particles in the fluid region, wherein the magnetochemical sensor comprises: a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer situated between and coupled to the first ferromagnetic layer and the second ferromagnetic layer. A device may further include a current-carrying structure for drawing the magnetic particles in the fluid region toward the magnetochemical sensor, wherein: the current-carrying structure consists of a single, undivided structure, and the current-carrying structure is configured to carry a current in at least one direction that is substantially parallel to an in-plane axis or a longitudinal axis of the magnetochemical sensor. The magnetochemical sensor may be one of a plurality of magnetochemical sensors in a sensor array.

Abstract: The present disclosure generally relates to more efficient use of a delta buffer. To utilize the delta buffer, an efficiency can be gained by utilizing absolute delta entries and relative delta entries. The absolute delta entry will include the type of delta entry, the L2P table index, the L2P table offset, and the PBA. The relative delta entry will include the type of delta entry, the L2P table offset, and the PBA offset. The relative delta entry will utilize about half of the storage space of the absolute delta entry. The relative delta entry can be used after an absolute delta entry so long as the relative delta entry is for data stored in the same block as the previous delta entry. If data is stored in a different block, then the delta entry will be an absolute delta entry.