Abstract: An address locked loop (ALL) apparatus for address recycling is provided. The apparatus comprises a block of memory further comprising a plurality of buffers configured to store a plurality of incoming packets, an address stack configured for storing of a plurality of free addresses, an address locked loop (ALL) control block configured to provide an arbitrated interface with the address stack for filling address requests by a local process and for returning free addresses from the local process to the address stack, and a stack address counter configured to maintain count of the available free addresses remaining on the address stack.

Abstract: A method for digital clock smoothing is provided. The method comprises: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a FIFO two-port memory block; (B) obtaining FIFO depth B by subtracting modulo B for each stored symbol a symbol output address from a symbol input address; (C) inputting FIFO depth B into a programmable look-up table (LUT); (D) obtaining a phase detector error signal; (E) scaling the phase detector error signal to obtain a scaled error factor; (F) adding the scaled error factor to a nominal phase step to obtain a phase update; (G) obtaining a smoothed symbol rate; and (H) reading out each output symbol from FIFO under control of an output FIFO address control register at the smoothed symbol rate.

Abstract: A method of automated acquisition of a QAM signal is provided. The method employs a State machine progressing from an initial State to a final State. The State machine comprises: a symbol timing recovery loop; a carrier loop; a coarse frequency loop; and an equalizer. The method comprises: (A) Performing an automatic gain control (AGC) operation on an incoming QAM signal; (B) Performing a symbol timing recovery of an input QAM signal by adjusting a sampling clock of the symbol timing recovery loop; (C) Performing a Blind Equalization of the QAM signal without carrier lock; (D) Performing a carrier recovery of the QAM signal; and (E) Performing a decision directed equalization (DDE) of the QAM signal by updating a set of coefficients of the equalizer by using a decision based algorithm.

Abstract: An apparatus for encrypting and decrypting an original data stream is provided. The apparatus comprises: a key including a key-algorithm, an interleaver having at least one dynamically changeable interleaving parameter, and a de-interleaver adapted to communicate with a communication channel.

Abstract: An apparatus for automated acquisition of a QAM signal. The apparatus employs a State machine progressing from an initial State to a final State. The State Machine comprises: (A) an AGC State further comprising a Minimum Sub-State further comprising: Coarse Estimate Sub-State; and an AGC Lock Sub-State further comprising Maximum Sub-State; (B) a Clock 1 State further comprising a Minimum Sub-State, and a Maximum Sub-State; (C) a Clock 2 State further comprising: a Minimum Sub-State; and a Maximum Sub-State; and (D) a Blind State further comprising a Minimum Sub-State; a Threshold Sub-State further comprising a Maximum Sub-State; and a Hysteresis Sub-State.

Abstract: A digital dental image apparatus comprising: an intra-oral image sensor configured to output a raw analog video signal; a processing raw analog video signal (PRAVS) means for processing the raw analog video signal for optimum detection; a digitizing, over sampling, and averaging (DOSA) means for digitizing, over sampling, and averaging the optimized analog video signal; a programmable control and signal processing (PCSP) means configured to generate a control signal to control an over sampling rate of the (DOSA) means; and a low noise power supply that improves the intra-oral image sensor performance. The PCSP means is configured to process the DOSA video signal, and configured to output the processed DOSA video signal to an output network interface.

Abstract: A method for encrypting and decrypting an original data stream comprising: (A) transmitting a copy of a key to an interleaver and to a de-interleaver, wherein the key includes a key-algorithm configured to describe an evolution in time of at least one interleaving parameter; (B) interleaving the original data stream by using the interleaver, wherein the interleaver compensates for a change in latency caused by at least one dynamically changeable interleaving parameter; and (C) recovering the original data stream from the interleaved data stream propagated through the communication channel by using the de-interleaver adapted to communicate with the communication channel, wherein the de-interleaver compensates for a change in latency caused by at least one dynamically changeable interleaving parameter.

Abstract: A method for digital clock smoothing comprising: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a two-port memory block; (B) accumulating a plurality of symbols of the asynchronous data stream in the two-port memory block for a predetermined time period; (C) computing an average symbol rate for the input asynchronous data stream; (D) generating a clock error signal equal to the difference between the average symbol rate of the input asynchronous data stream and a nominal output synchronous clock; (E) obtaining a smoothed symbol rate clock by using the error clock signal; and (F) generating an output smoothed data stream having the smoothed symbol rate clock.

Abstract: The method of selecting an optimum mode of operation of the QAM modem comprising (A) using a host interface to select a pair of states, the first state being an initial state; the second state being an intermediate state; and (B) causing a state machine to progress from the initial state to a final state via the intermediate state to optimize the performance of the QAM modem.

Abstract: An apparatus for demodulating a digital input signal having a pre-assigned symbol rate by using a single sample clock signal is disclosed. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates. The apparatus comprises: a Cascaded Integrated Comb (CIC) Decimator filter configured to perform a filtering-decimation operation to isolate the down converted digital signal having the pre-assigned symbol rate; a Shaper configured to restore an original spectrum of the I and Q components of the CIC output signal; and a CIC tuner loop filter configured to insert the estimated by the Coarse Frequency estimation block frequency offset into a carrier loop in order to complete a carrier recovery of the pre-assigned input digital signal.

Abstract: An apparatus for modulating a digital input signal having a pre-assigned symbol rate and having a baseband carrier frequency by using a single sample clock signal. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates.

Abstract: A method and apparatus for plesiochronous synchronization of an integer N plurality of subscriber networks to a hub network. Each subscriber network including a sub's clock, and the hub network includes a hub's clock.

Abstract: A method for frequency estimation in a QAM modem comprising the following steps: (1) receiving inphase and quadrature components of a QAM symbol from a carrier recovery block; (2) mapping received QAM symbol to a nearest QAM plant point using a slicer; (3) determining an instant error power of the received QAM point; (4) averaging the instant error power over a plurality of incoming QAM symbols in time domain; (5) excluding a DC component from the averaged error power; (6) translating the averaged error power without DC component from time domain into a frequency domain in order to determine the frequency spectrum of the averaged error power; (7) selecting the frequency spectrum component of the averaged error power with the maximum amplitude by using a peak detection; and (8) determining the frequency offset as the maximum frequency spectrum component of the averaged error power.

Abstract: In a system comprising a subscriber (sub) carrier tracking loop and a hub carrier tracking loop, a method and apparatus for resolving phase equivocation.

Abstract: A method of baseband/passband digital modulation for a data transmission system wherein a plurality of data symbols is transmitted over a transmission channel at a symbol rate. The method comprises the following steps: (1) generating a plurality of I and Q components of symbols by mapping an input bit stream comprising a plurality of digital codewords into a QAM constellation; (2) selecting a passband or a baseband mode; and (3) generating an analog output signal in the passband or baseband mode. The step of selecting the passband or the baseband mode depends on the complexity of QAM constellation. If QAM constellation includes less than 64 QAM plant points, the passband mode is selected, and if QAM constellation includes more than 64 QAM plant points, the baseband mode is selected.

Abstract: In a QAM demodulator including an adaptive equalizer, a method of carrier tracking comprising the following steps is disclosed: (A) sampling a QAM signal received from a transmission channel; (B) recovering a symbol clock function from the sampled QAM signal; (C) applying the sampled QAM signal to the adaptive equalizer in order to obtain a QAM equalized signal in a Blind Equalization (BE) mode; (D) using a slicer to locate a nearest plant point for the QAM Blind equalized signal for each recovered symbol clock; (E) using a complex conjugate multiplier to obtain an instantaneous inphase component and an instantaneous quadrature component of a phase angle error signal; (F) using a linear phase detector to obtain an instantaneous phase angle error for each symbol clock; (G) averaging the instantaneous phase angle error signal by using a carrier loop filter; (H) using a complex multiplier to insert an inverse of the averaged phase angle error signal into the QAM Blind equalized signal to compensate for the carri

Abstract: Method for predistortion compensation for nonlinear distortion produced by the non-linear power amplifier of the QAM signal at the transmitter side of the direct digital communication channel. The out-of-band signal power is monitored by the existent receiver at the receive side of the direct propagation channel. The nonlinear distortion compensation signal is generated at the receiver/demodulator side of the direct propagation channel and transmitted across the direct propagation channel to an input of a pre-distortion block at the transmitter/modulator side of the direct propagation channel. The nonlinear distortion compensation signal is used to adjust the set of parameters of the pre-distortion block in order to minimize the out-of-band power produced by the non-linear amplifier (NLA).