Abstract: Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to receive a plurality of sinusoidal signals. Each sinusoidal signal has a unique frequency. The band group selector selects between a plurality of band groups. The band group selector is coupled to receive a first signal from the multiplexer. The multiplexer multiplexes between the plurality of sinusoidal signals and provides the first signal. The band group selector includes a band mixer. The band mixer mixes the first signal with a band signal having a band frequency. The band signal corresponds to a band group selected from the plurality of band groups. The band group selector provides a transmitter mixer signal and a receiver mixer signal.

Abstract: Embodiments of the present invention include circuits and methods for improving the spectral purity of mixer circuits. In one embodiment the present invention includes a mixer circuit comprising a first transistor having a gate, a source and a drain, a second transistor having a gate, a source and a drain, a first capacitance coupled between the source of the first transistor and the source of the second transistor and a bias circuit having an input, a first output coupled to the source of the first transistor and a second output coupled to the source of the second transistor. The present invention may be advantageously used in a wireless transmitter application.

Abstract: A multi-modal medical imaging and type detection have been described have been disclosed. By combining a broadband radio imaging system and one or more other modalities of image processing an enhanced image and/or tissue classification can be produced.

Abstract: A Multiphase VCO Circuits and Methods with Wide Tuning Range have been disclosed.

Abstract: Embodiments of the present invention include programmable filter circuits and methods. In one embodiment, the present invention includes a programmable filter for filtering an input signal comprising a storage element for storing a plurality of digital values representing a discrete time window function, and a plurality of filter channels, each channel comprising a multiplying digital-to-analog converter having a plurality of digital inputs coupled to the storage element and an analog input for receiving said input signal to be filtered, at least one capacitor having at least one terminal coupled to an output of the multiplying digital-to-analog converter, and a sampling device coupled between the at least one terminal of the at least one capacitor and an output of the filter. In another embodiment, the present invention includes a software defined radio.

Abstract: Embodiments of the present invention transmit signals simultaneously over a communication channel at different RF center frequencies, and may use a single power amplifier and antenna. In one embodiment the present invention includes a method of transmitting information in a wireless communication channel comprising receiving digital signals having data to be transmitted, converting the signals to analog signals, up-converting each analog signal, combining the up-converted signals, amplifying the combined up-converted signal and transmitting the combined up-converted signal. In one embodiment, the same data is sent over a transmission channel at two different frequencies to improve reliability.

Abstract: Embodiments of the present invention include techniques for performing cross correlations. In one embodiment the present invention includes a cross correlation system for use in a communication system comprising a wireless receiver receiving a signal including a first sequence of data values and converting the first sequence of data values into a sequence of digital data values, the wireless receiver further comprising a plurality of cross correlators that each receive the digital data values and cross correlate the digital data values with a corresponding plurality of different binary reference patterns, wherein if the first sequence of data values correlates with one of said plurality of binary reference patterns, one of said cross correlators generates a peak. In one embodiment, the cross correlators are partitioned into stages. In another embodiment, the received data values are loaded into a memory that is shared by the cross correlators to reduce hardware requirements.

Abstract: Embodiments of the present invention include methods for wide bandwidth synthesizer circuits and methods. In one embodiment, the present invention includes a frequency synthesizer comprising a multiplexer and a band group selector. The multiplexer is coupled to receive a plurality of sinusoidal signals. Each sinusoidal signal has a unique frequency. The band group selector selects between a plurality of band groups. The band group selector is coupled to receive a first signal from the multiplexer. The multiplexer multiplexes between the plurality of sinusoidal signals and provides the first signal. The band group selector includes a band mixer. The band mixer mixes the first signal with a band signal having a band frequency. The band signal corresponds to a band group selected from the plurality of band groups. The band group selector provides a transmitter mixer signal and a receiver mixer signal.

Abstract: In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

Abstract: In one embodiment the present invention include systems and methods for synchronizing wireless communication systems. In one embodiment, a baseband processor includes a reference frequency for synchronizing processing of received data. The baseband processor may detect received data and determine frequency hopping sequences to program a frequency synthesizer. The baseband processor may synchronize the synthesizer's frequency changes to receive incoming data. Symbols received by the system may be detected and used to start the reference frequency. In one embodiment, the reference frequency has a period equal to the symbol period. Cross-correlators may be used to detect frequency hopping patterns. Clusters of results from the cross-correlators may be analyzed and the results used to control timing of the system.

Abstract: In one embodiment the present invention includes an electrical arrangement comprising conductive elements such as electrical traces. The conductive elements carry differential signals. The conductive elements extend horizontally and have alternating sections around one or more center lines. Ground lines may be included the further enhance signal integrity. In one embodiment, magnetic field cancellation may be achieved by providing an offset between pairs of alternating differential elements.

Abstract: In one embodiment, the present invention includes an electronic circuit comprising a first stage having a first differential inductive element and a second differential inductive element, and a second stage coupled to an output of the first stage, the second stage having a first differential inductive element and a second differential inductive element, wherein the first and second differential inductive elements of the first stage couple magnetically to generate a first phase error, wherein the first and second differential inductive elements of the second stage couple magnetically to generate a second phase error, and wherein the second phase error cancels the first phase error.

Abstract: Embodiments of the present invention include circuits and methods with wide bandwidths. In one embodiment, parasitic capacitances of the output of a first stage and the input of a second stage are included in a network. The output of the first stage is coupled to the input of the network, and the input of the second stage is coupled to an intermediate node of the network. In one embodiment, the parasitic capacitance of the second stage is the largest capacitance in the network. In another embodiment, passive networks are coupled to the outputs of a stage, and one or more current injection circuits may be used to extend the bandwidth of the circuit.

Abstract: Embodiments of the present invention include a frequency synthesizer comprising a first plurality of dividers receiving a first signal having a first frequency and generating a first plurality of divided signals and a frequency combination network including a plurality of mixers, the frequency combination network receiving one or more of the first plurality of divided signals and generating a plurality of synthesized signals having different frequencies. The frequency combination network may further include additional dividers and multiplexers for more flexibility in synthesizing different frequencies. In one embodiment, the frequency combination network is coupled to dividers in the feedback path of a phase locked loop. The present invention is particularly advantageous for synthesizing frequencies above one (1) gigahertz.

Abstract: Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

Abstract: Embodiments of the present invention include circuits and methods for reducing DC Offset. In one embodiment the present invention includes storing DC offset on internal capacitances. In one embodiment, parallel stages are used to remove DC offset corresponding to different local oscillator frequencies. Embodiments of the invention further include changing the low cutoff frequency of the DC cancellation circuits for fast calibration. In a first state, a high pass filter may have a first low cutoff frequency, and in a second state the high pass filter may have a second cutoff frequency lower than the first low cutoff frequency. The present invention also includes a variable gain amplifier with reduced DC offset.

Abstract: Embodiments of the present invention include circuits and methods for dividing signals. In one embodiment the present invention includes a divider circuit comprising at least one first divider input receiving an in-phase (I+) signal, at least one second divider input receiving a complement of the in-phase (I?) signal, at least one third divider input receiving a quadrature (Q+) signal, and at least one fourth divider input receiving a complement of the quadrature (Q?) signal. In one embodiment, the lock range of a divider is improved by providing a first bias current greater than a second bias current.