Abstract: A driver circuit for use in driving displays has an input receiving a digital input data having n bits for selecting one of a plurality of voltage levels for driving the circuit. The circuit also has an output, a plurality of digital signal lines coupled to the digital input data, and a plurality of active regions coupled to a first side of the output. Each of the plurality of active regions is coupled to a separate voltage level. The circuit further includes a plurality of pass transistors at a first subset of locations where the plurality of digital signal lines overlap the plurality of active regions, and a plurality of depletion-implanted transistors at a second subset of locations where the plurality of digital signal lines overlap the plurality of active regions. The number of the plurality of digital signal lines on one side of the output can be odd number, such as 2n−1, or can be 2n−2.