Abstract: A small antenna comprising an unequal current density center-fed dipole employing a conductive trace and a ground plane counterpoise positioned substantially perpendicular to each other. According to one embodiment, a conductive trace is etched onto a dielectric substrate to form a printed circuit. According to a further embodiment, the conductive trace has two sets of orthogonal components; one set of components captures the desired electric field polarization and the second set of components cancels out the undesired cross polarization. A portion of a signal received on the first set of components adds together to produce a desired resultant vector and a portion of the signal received on the second set of components adds together to cancel out the undesired vector.

Abstract: A method and apparatus for combined timing recovery, frame synchronization and frequency offset correction in a digital receiver is provided. In general, the present invention provides a pair of correlators that operate on a set of samples output by a discriminator. A positive correlator generates a positive correlation value and a negative correlator generates a negative correlation value. The positive and negative correlation values are used to determine frame synchronization, frequency offset and timing recovery values so that timing recovery, frame synchronization and frequency offset correction may be performed simultaneously.

Abstract: A integrated circuit card having a rigidized frame to surround the electronic devices on a printed circuit (PC) board. The card includes a frame and integral cover for the top and bottom. The top and bottom are constructed out of a material that does not interfere with the use of an antenna coupled to the board assembly within the card. The bottom and top are coupled together using pins. When the two are coupled together the frame is better supported.

Abstract: A novel direct conversion receiver utilizing a sample and hold circuit for subsampling the input signal. The output of the sample and hold circuit is applied to a sigma-delta loop to provide a high speed low resolution data stream which in turn is applied to a decimator which provides a high precision, low data rate signal having quadrature outputs.

Abstract: A low noise narrow band amplifier with low power consumption for amplifying radio frequency and microwave signals. The amplifier includes a high frequency transistor that has a cut-off frequency greater than the center frequency of the input signal. The amplifier includes an emitter inductor for low noise and better input match. The amplifier is stabilized for out-of-band high frequency oscillations by a collector inductor and a base inductor. The amplifier is further stabilized unconditionally for out-of-band high frequency oscillations by a stabilizing circuit coupled between the output and ground, including a stabilizing capacitor in series with a stabilizing resistor.

Abstract: Improved integration and simplified construction of direct conversion receivers is achieved by providing selectivity in the early stages of a sigma delta converter to reject adjacent channel signals and thereby allow greater dynamic range for the desired input signals. A bandpass sigma delta converter is taught which is suitable for use with signals having multiple protocols. In a first stage, an aliased input signal is applied to two filters having desired and preferably programmable filter characteristics which provide selectivity to the input signal. A third filter is utilized having a programmable center frequency, which receives as an input signal the sum of the filtered input signal plus the quantization noise of the first stage. This provides a first intermediate output signal of desired selectivity.