Patents Assigned to Worldwide Semiconductor Mfg. Corp.
  • Patent number: 6228753
    Abstract: A method of fabricating bonding pad structure for improving bonding pad surface quality. A substrate has a bonding pad thereon. A passivation is formed on the bonding pad to expose the bonding pad. A sacrificial layer is formed on the passivation and an opening is formed within the sacrificial layer to expose the bonding pad. A Cu/Al alloy is formed on the passivation to at least cover the bonding pad. The sacrificial layer and the Cu/Al alloy thereon are removed, such that the Cu/Al alloy remains on the bonding pad.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: May 8, 2001
    Assignee: Worldwide Semiconductor Mfg Corp
    Inventors: Yung-Tsun Lo, Wen-Yu Ho, Sung-Chun Hsieh
  • Patent number: 6211091
    Abstract: The invention describes a self-aligned etching process. A conductive layer and a first insulating layer are formed on a substrate in sequence, and then the conductive layer and the first insulating layer are patterned to form a plurality of stacks on desired regions. Subsequently, spacers are formed on sidewalls of each stack, and a stop layer is then formed on the substrate. A second insulating layer is formed on the substrate and is planarized. Portions of the second insulating layer are removed to form a plurality of openings and to expose portions of the stop layer located between spacers. The exposed stop layer is removed.
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: April 3, 2001
    Assignee: Worldwide Semiconductor Mfg. Corp.
    Inventors: Wan-Yih Lien, Meng-Jaw Cherng