Patents Assigned to Worldwide Seminconductor Manufacturing Corporation
  • Patent number: 6033966
    Abstract: A method for manufacturing an 8-shaped bottom storage node. A dielectric layer and a polysilicon layer are deposited. A bit line contact and a storage node contact are formed through the dielectric layer and the polysilicon layer down to an access transistor. After formation of the bit line contact and the storage node contact, the polysilicon layer is removed leaving the first dielectric layer. A polysilicon layer is deposited over the dielectric layer and into the bit line contact and storage node contacts. This is followed by a deposition of a tungsten silicide layer and a second dielectric layer. These layers are then etched to form a bit line above the bit line contact. Sidewall spacers are formed on the sidewalls of the bit line. Another polysilicon layer is deposited into the storage node contacts and above the bit line. This polysilicon layer is patterned and etched in an 8 pattern. Oxide spacers are formed on the sidewalls of the etched polysilicon layer.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: March 7, 2000
    Assignee: Worldwide Seminconductor Manufacturing Corporation
    Inventor: Kung Linliu