Patents Assigned to XCELEMOR, INC.
  • Patent number: 11494322
    Abstract: A method of operation of a computing system includes: providing a first cluster having a first kernel unit for managing a first reconfigurable hardware device; analyzing an application descriptor associated with an application; generating a first bitstream based on the application descriptor for loading the first reconfigurable hardware device, the first bitstream for implementing at least a first portion of the application; and implementing a first fragment with the first bitstream in the first cluster.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: November 8, 2022
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 9495310
    Abstract: A method of operation of a computing system includes: reconfigurable hardware devices having first application fragment and second application fragment; configuring virtual bus module having virtual bus for electrically coupling the reconfigurable hardware devices; allocating a physical port in the virtual bus, based on availability, for coupling the first application fragment and the second application fragment through the virtual bus; implementing an application through the virtual bus including transferring application data between the first application fragment and the second application fragment; activating a signal buffer interface by the virtual bus module: activating a pin buffer dispatch module for storing the application data from application input buffer, and activating memory request port by roll-back table module, storing the application data, in response to the pin buffer dispatch module; and alerting a roll-back detector including dismissing the application data exceeds a roll-back threshold or
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: November 15, 2016
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 9152748
    Abstract: A method of operation of a computing system includes: calculating an initial data connection traversing a center state node of a switching network having an ingress stage, a center stage, and an egress stage; calculating a repacking route across the switching network traversing the center switching node; broadcasting an ingress portion of the repacking route simultaneously to ingress nodes of the ingress stage; broadcasting a center portion of the repacking route simultaneously to center nodes of the center stage with the ingress portion completely deployed; broadcasting an egress portion of the repacking route simultaneously to egress nodes of the egress stage with the center portion completely deployed; and deploying a repacked data connection with the repacking route traversing the center switching node across the switching network synchronously with the initial data connection.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: October 6, 2015
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Publication number: 20150234755
    Abstract: A method of operation of a computing system includes: reconfigurable hardware devices having first application fragment and second application fragment; configuring virtual bus module having virtual bus for electrically coupling the reconfigurable hardware devices; allocating a physical port in the virtual bus, based on availability, for coupling the first application fragment and the second application fragment through the virtual bus; implementing an application through the virtual bus including transferring application data between the first application fragment and the second application fragment; activating a signal buffer interface by the virtual bus module: activating a pin buffer dispatch module for storing the application data from application input buffer, and activating memory request port by roll-back table module, storing the application data, in response to the pin buffer dispatch module; and alerting a roll-back detector including dismissing the application data exceeds a roll-back threshold or
    Type: Application
    Filed: May 1, 2015
    Publication date: August 20, 2015
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Patent number: 9055070
    Abstract: A method of operation of a hardware computing system includes: receiving a command stream from a general purpose central processing unit; transferring a command from the command stream by an application manager; activating a programmable execution array, by the application manager, for processing the command; and providing a response through a result stateful multiplexer to the general purpose central processing unit for the command from the command stream.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: June 9, 2015
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 9053266
    Abstract: A method of operation of a computing system includes: providing reconfigurable hardware devices having a first application fragment and a second application fragment; configuring a virtual bus module having a virtual bus for coupling the reconfigurable hardware devices; allocating a physical port in the virtual bus, based on availability, for communicatively coupling the first application fragment and the second application fragment through the virtual bus; and implementing an application through the virtual bus including transferring application data between the first application fragment and the second application fragment.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: June 9, 2015
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 9055069
    Abstract: A method of operation of a hardware computing system includes: generating a command stream by a general purpose central processing unit; and receiving, by an application manager, the command stream for executing a command by a programmable execution engine and providing a status through a command execution interface to the general purpose central processing unit for the command from the command stream.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: June 9, 2015
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 8868894
    Abstract: A method of manufacture of a computing system includes: executing a first application, active and implemented as hardware within a hardware component having of one or more of reconfigurable hardware devices; detecting a trigger event in a first microkernel; generating a first hardware descriptor based on the trigger event, the first hardware descriptor to configure a portion of the hardware component for the first application or a second application; and configuring the portion of the hardware component with the first hardware descriptor while the first application executes concurrently.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: October 21, 2014
    Assignee: Xcelemor, Inc.
    Inventor: Peter J Zievers
  • Patent number: 8869087
    Abstract: A method of operation of an computing system includes: providing a microkernel; controlling a reconfigurable hardware device by the microkernel; configuring an event scoreboard module for monitoring the reconfigurable hardware device; and implementing an application configured in the reconfigurable hardware device including receiving a machine identifier for the reconfigurable hardware device.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: October 21, 2014
    Assignee: Xcelemor, Inc.
    Inventor: Peter J. Zievers
  • Patent number: 8756548
    Abstract: A method for operating a computing system includes: receiving an application-tree for instantiating an application in a reconfigurable hardware device; operating a kernel unit for determining an unoccupied logic-sector within a reconfigurable hardware device; calculating a layout section from the application-tree according to the unoccupied logic-sector for instantiating a fragment circuitry corresponding to the layout section; and determining a system table for connecting the fragment circuitry to other portions of the application to form the application having the fragment circuitry.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: June 17, 2014
    Assignee: Xcelemor, Inc.
    Inventor: Peter J Zievers
  • Publication number: 20130226986
    Abstract: A method of operation of a hardware computing system includes: transferring a command to a remote application manager through a network bus; executing, by a programmable execution array of the remote application manager, the command; identifying, with a routing logic module, a subsequent command to be executed by an alternate remote application manager; and providing a response through the network bus for the command.
    Type: Application
    Filed: March 18, 2013
    Publication date: August 29, 2013
    Applicant: XCELEMOR, INC.
    Inventor: XCELEMOR, INC.
  • Publication number: 20130191854
    Abstract: A method of operation of a hardware computing system includes: receiving a command stream from a general purpose central processing unit; transferring a command from the command stream by an application manager; activating a programmable execution array, by the application manager, for processing the command; and providing a response through a result stateful multiplexer to the general purpose central processing unit for the command from the command stream.
    Type: Application
    Filed: March 7, 2013
    Publication date: July 25, 2013
    Applicant: Xcelemor, Inc.
    Inventor: Xcelemor, Inc.
  • Publication number: 20130160031
    Abstract: A method of operation of a hardware computing system includes: generating a command stream by a general purpose central processing unit; and receiving, by an application manager, the command stream for executing a command by a programmable execution engine and providing a status through a command execution interface to the general purpose central processing unit for the command from the command stream.
    Type: Application
    Filed: February 11, 2013
    Publication date: June 20, 2013
    Applicant: XCELEMOR, INC.
    Inventor: XCELEMOR, INC.
  • Publication number: 20120284379
    Abstract: A method of operation of a computing system includes: calculating an initial data connection traversing a center state node of a switching network having an ingress stage, a center stage, and an egress stage; calculating a repacking route across the switching network traversing the center switching node; broadcasting an ingress portion of the repacking route simultaneously to ingress nodes of the ingress stage; broadcasting a center portion of the repacking route simultaneously to center nodes of the center stage with the ingress portion completely deployed; broadcasting an egress portion of the repacking route simultaneously to egress nodes of the egress stage with the center portion completely deployed; and deploying a repacked data connection with the repacking route traversing the center switching node across the switching network synchronously with the initial data connection.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Publication number: 20120284492
    Abstract: A method of manufacture of a computing system includes: executing a first application, active and implemented as hardware within a hardware component having of one or more of reconfigurable hardware devices; detecting a trigger event in a first microkernel; generating a first hardware descriptor based on the trigger event, the first hardware descriptor to configure a portion of the hardware component for the first application or a second application; and configuring the portion of the hardware component with the first hardware descriptor while the first application executes concurrently.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Publication number: 20120284502
    Abstract: A method for operating a computing system includes: receiving an application-tree for instantiating an application in a reconfigurable hardware device; operating a kernel unit for determining an unoccupied logic-sector within a reconfigurable hardware device; calculating a layout section from the application-tree according to the unoccupied logic-sector for instantiating a fragment circuitry corresponding to the layout section; and determining a system table for connecting the fragment circuitry to other portions of the application to form the application having the fragment circuitry.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Publication number: 20120284438
    Abstract: A method of operation of an computing system includes: providing a microkernel; controlling a reconfigurable hardware device by the microkernel; configuring an event scoreboard module for monitoring the reconfigurable hardware device; and implementing an application configured in the reconfigurable hardware device including receiving a machine identifier for the reconfigurable hardware device.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Publication number: 20120284501
    Abstract: A method of operation of a computing system includes: providing a first cluster having a first kernel unit for managing a first reconfigurable hardware device; analyzing an application descriptor associated with an application; generating a first bitstream based on the application descriptor for loading the first reconfigurable hardware device, the first bitstream for implementing at least a first portion of the application; and implementing a first fragment with the first bitstream in the first cluster.
    Type: Application
    Filed: May 4, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers
  • Publication number: 20120284439
    Abstract: A method of operation of a computing system includes: providing reconfigurable hardware devices having a first application fragment and a second application fragment; configuring a virtual bus module having a virtual bus for coupling the reconfigurable hardware devices; allocating a physical port in the virtual bus, based on availability, for communicatively coupling the first application fragment and the second application fragment through the virtual bus; and implementing an application through the virtual bus including transferring application data between the first application fragment and the second application fragment.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 8, 2012
    Applicant: XCELEMOR, INC.
    Inventor: Peter J. Zievers