Abstract: A system and method for implementing variable-precision matrix multiplications using a low-precision digit matrix multiplier is disclosed. The system enables multiplication of matrices of different dimensions by splitting the large matrix into fixed-size matrix blocks. These block matrices are further decomposed into fixed-precision digit submatrices that are then individually multiplied, scaled, and accumulated to allow for variable-precision matrix multiplication. The system uses a systolic array of block matrix multipliers, which are each an array of dot product units, to efficiently implement larger matrix multiplications without substantially increasing either latency or wiring congestion. The system further uses only unsigned digit matrix multipliers but accounts for signed matrix multiplication by using row and column sums of the input matrices to adjust for the signed to unsigned conversion.