Abstract: The present disclosure provides a micro light-emitting element, method for manufacturing a micro light-emitting element, and a light-emitting device. The micro light-emitting element includes a DBR structure layer, including a DBR adhesive layer, a DBR reflective layer, and a DBR sacrificial layer, where the DBR adhesive layer, the DBR reflective layer, and the DBR sacrificial layer are sequentially stacked. Subsequent structural coverage of a DBR reflective layer is improved by means of the DBR adhesion layer. Density of film layers of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially increased, so that etching rates of the DBR sacrificial layer, the DBR reflective layer, and the DBR adhesive layer are sequentially decreased during etching, thereby forming an inverted trapezoidal through hole which comprises an inclined side wall by an etching process.

Abstract: A light-emitting structure, comprising: a substrate, and a first metal layer, an insulating layer, an integrated metal layer, and an epitaxial stack, disposed above the substrate. The integrated metal layer is disposed on a surface of the second-type semiconductor layer facing away from the active region, and the integrated metal layer comprises an exposed surface on a side of the integrated metal layer facing the second-type semiconductor layer, the exposed surface being configured to electrically connect with an external driving device.

Abstract: The present disclosure provides a semiconductor epitaxial structure, including a substrate, a first-type semiconductor layer, an active region comprising at least one quantum layer, and a second-type semiconductor layer sequentially stacked on a surface of the substrate; wherein the quantum layer comprises barrier layers and potential well layers, and the barrier layers are alternately stacked with the potential well layers, and wherein the quantum layer further comprises a growth temperature transition layer between a barrier layer and a potential well layer, or an electron confinement layer between a barrier layer and a potential well layer.

Abstract: The present disclosure provides a semiconductor epitaxial structure and a manufacturing method therefor, and an LED chip. The semiconductor epitaxial structure may include a substrate, an N-type semiconductor layer, a gate elimination layer, an active layer and a P-type semiconductor layer are sequentially stacked on a surface of a substrate. Furthermore, the gate elimination layer comprises an N-type doped semiconductor layer.

Abstract: A light-emitting diode (LED) sub-chip and a method of producing the same are provided. The LED sub-chip comprises an epitaxial layer disposed on a growth substrate, where the epitaxial layer comprises a plurality of electrodes. The groove disposed between the LED sub-chip and a second LED sub-chip, where the groove penetrates through the epitaxial layer separating the two sub-chips. The bridge insulating layer at least partially covering a sidewall of the groove, where the sidewall comprises a first surface and a second surface above the first surface, where the texture of the second surface is less granular than a texture of the first surface. The bridge electrode on the bridge insulating layer, where the bridge electrode connects respective electrodes of the two sub-chips at the first surface.

Abstract: A flip-chip of light emitting diode includes at least one reflective layer, at least one N-type electrode, at least one P-type electrode, at least one distributed Bragg reflector, and an epitaxial unit. The epitaxial unit includes a substrate, an N-type layer, an active layer, and a P-type layer, wherein the substrate, the N-type layer, the active layer, and the P-type are sequentially stacked. The epitaxial unit has at least one N-type layer exposed portion, which is extended from the outer side surface of the P-type layer to the N-type layer via the active layer. The at least one reflective layer is formed on the P-type layer, wherein the at least one distributed Bragg reflector is integrally bonded to the N-type layer, the active layer, the P-type layer, and the at least one reflective layer. The at least one N-type electrode is electrically connected with the N-type layer and the at least one P-type electrode is electrically connected with the P-type layer.

Abstract: A light-emitting diode (LED) chip (2) comprises a substrate (20), an epitaxial structure (21), a transparent conductive layer (22), a passivation protective layer (23), and at least one electrode (25). The epitaxial structure (21) is disposed on the substrate (20). The transparent conductive layer (22) is disposed on the epitaxial structure (21). The transparent conductive layer (22) defines one or more first through holes (220) that extend through the transparent conductive layer (22). The passivation protective layer (23) is disposed on the transparent conductive layer (22). The passivation protective layer (23) defines one or more second through holes (230) that extend through the passivation protective layer (23). The electrode (25) is disposed on the passivation protective layer (23). The electrode (25) electrically connects the transparent conductive layer (11) through the one or more second through holes (230).

Abstract: A flip light emitting chip and a manufacturing method thereof are disclosed, wherein the flip light emitting chip comprises an N-type semiconductor layer, an active region, a P-type semiconductor layer, a reflective layer, a barrier layer, a bonding layer, a first insulating layer, an extended electrode layer, a second insulating layer, an N-type electrode, and a P-type electrode sequentially grown from a substrate. The first insulating layer has at least one first channel and at least one second channel. A first extended electrode portion and a second extended electrode portion of the extended electrode layer are respectively formed on the first insulating layer and extended to the N-type semiconductor layer via the first channel and to the barrier layer via the second channel. The second insulating layer has at least one third channel and at least one fourth channel.

Abstract: A semiconductor light emitting chip includes a substrate and an N-type semiconductor layer sequentially developed from the substrate, an active region, a P-type semiconductor layer, a reflective layer, at least two insulating layers, an anti-diffusion layer and an electrode set. One of the insulating layers is extended to surround the inner peripheral portion of the reflective layer, and another the insulating layer is extended to surround the outer peripheral portion of the reflective layer, such that the insulating layer isolates the anti-diffusion layer from the P-type semiconductor layer. The electrode set includes an N-type electrode and a P-type electrode, wherein the N-type electrode is electrically connected to the N-type semiconductor layer, and the P-type electrode is electrically connected to the P-type semiconductor layer.

Abstract: A flip light emitting chip and a manufacturing method thereof are provided. The flip light emitting chip includes a substrate and an extended stacking layer formed on the substrate. The extended stacking layer includes a first semiconductor layer formed on the substrate, an active region formed on the first semiconductor layer, and a second semiconductor layer formed on the active region. The flip light emitting chip further includes a reflective layer formed on the second semiconductor layer, a barrier layer formed on the second semiconductor layer and covering the reflective layer, a bonding layer formed on the barrier layer and an insulating layer formed on the bonding layer such that the bonding layer is retained between the barrier layer and the insulating layer for enhancing a binding force between the barrier layer and the insulating layer.

Abstract: A semiconductor chip of a LED and a manufacturing method thereof are disclosed. The semiconductor chip includes a substrate, an N-type semiconductor layer, an active region, a P-type semiconductor layer, and at least one semiconductor exposing portion extending from the P-type semiconductor layer to the N-type semiconductor layer. The semiconductor chip further includes one or more current blocking layers, a transparent conductive layer, an N-type electrode, and a P-type electrode, wherein the current blocking layer encapsulates the P-type semiconductor in such a manner to be stacked on the P-type semiconductor layer. The transparent conductive layer has one or more through holes corresponding to the one or more current blocking layers respectively. The N-type electrode is stacked on the N-type semiconductor layer and the P-type electrode is stacked on the N-type semiconductor layer. The P-type prongs of the P-type electrode are retained in the through holes of the transparent conductive layer respectively.

Abstract: A LED chip includes a substrate, an N-type semiconductor layer, an active region, a P-type semiconductor layer, a transparent electric conductive layer, and a passivation protective layer stacked with each other in sequence. The passivation protective layer has a plurality holes corresponding to different positions of the transparent electric conductive layer respectively. A P-type electrode is electrically linked with the transparent electric conductive layer through said plurality of holes, while an N-type electrode is electrically linked with said N-type semiconductor layer.

Abstract: A mini LED chip and a manufacturing method thereof are provided. The mini LED chip includes a growth substrate and a light-emitting epitaxial layer including a first type semiconductor layer, a luminous layer, and a second type semiconductor layer. The second type semiconductor layer and the luminous layer include an electrode contact hollow part that exposes the first type semiconductor layer. Further, the mini LED chip includes a transparent conductive layer disposed on a side of the second type semiconductor layer facing away from the growth substrate, an extended electrode disposed on a side of the transparent conductive layer facing away from the growth substrate, an insulating and isolating reflection layer covering the electrode contact hollow part and an exposed surface of the transparent conductive layer and the extended electrode facing away from the growth substrate, and a first bonding electrode and a second bonding electrode.

Abstract: Provided is a method for manufacturing a semiconductor wafer and a semiconductor wafer. The method includes: disposing a sacrificial layer on a first surface and a second surface of a patterned substrate, the patterned substrate comprising the first surface and the second surface having different normal directions; exposing the first surface by removing the first portion of the sacrificial layer disposed on the first surface; growing an original nitride buffer layer on the first surface and the second portion of the sacrificial layer; partially lifting off the second portion of the sacrificial layer disposed on the second surface such that at least one sub-portion of the second portion of the sacrificial layer remains on the second surface of the patterned substrate; and growing an epitaxial layer on the original nitride buffer layer, where a crystal surface of the epitaxial layer grows along a normal direction of the patterned substrate.

Abstract: A semiconductor chip of a light emitting diode includes a substrate, and an N-type gallium nitride layer, a quantum well layer, and a P-type gallium nitride layer stacked on the substrate successively, an N-type electrode electrically connected to the N-type gallium nitride layer, and a P-type electrode electrically connected to the P-type gallium nitride layer. The quantum well layer includes at least one quantum barrier and at least one quantum well stacked successively in sequence, wherein the growth pressure of the quantum barrier and the growth pressure of the quantum well are different, such that the interface crystal quality between the quantum well and the quantum barrier of the quantum well layer can be greatly improved to enhance the luminous efficiency of the semiconductor chip.

Abstract: A semiconductor chip of a LED and a manufacturing method thereof are disclosed. The semiconductor chip includes a substrate, an N-type semiconductor layer, an active region, a P-type semiconductor layer, and at least one semiconductor exposing portion extending from the P-type semiconductor layer to the N-type semiconductor layer. The semiconductor chip further includes one or more current blocking layers, a transparent conductive layer, an N-type electrode, and a P-type electrode, wherein the current blocking layer encapsulates the P-type semiconductor in such a manner to be stacked on the P-type semiconductor layer. The transparent conductive layer has one or more through holes corresponding to the one or more current blocking layers respectively. The N-type electrode is stacked on the N-type semiconductor layer and the P-type electrode is stacked on the N-type semiconductor layer. The P-type prongs of the P-type electrode are retained in the through holes of the transparent conductive layer respectively.

Abstract: A semiconductor wafer includes a substrate (1), a buffer layer (2) deposited on the substrate (1), and an epitaxial layer (4) above the buffer layer (2). The buffer layer (2) includes a plurality of semiconductor material layers (22) and a plurality of oxygen-doped material layers (21). The semiconductor material layers (22) and the oxygen-doped material layers (21) are deposited in an alternating arrangement on top of each other. Oxygen concentrations of the oxygen-doped material layers (21) gradually decrease along a direction from the substrate (1) to the epitaxial layer (4).

Abstract: Disclosed is a wafer or a material stack for semiconductor-based optoelectronic or electronic devices that minimizes or reduces misfit dislocation, as well as a method of manufacturing such wafer of material stack. A material stack according to the disclosed technology includes a substrate; a basis buffer layer of a first material disposed above the substrate; and a plurality of composite buffer layers disposed above the basis buffer layer sequentially along a growth direction. The growth direction is from the substrate to a last composite buffer layer of the plurality of composite buffer layers. Each composite buffer layer except the last composite buffer layer includes a first buffer sublayer of the first material, and a second buffer sublayer of a second material disposed above the first buffer sublayer. The thicknesses of the first buffer sublayers of the composite buffer layers decrease along the growth direction.

Abstract: A light-emitting diode (LED) sub-chip and a method of producing the same are provided. The LED sub-chip comprises an epitaxial layer disposed on a growth substrate, where the epitaxial layer comprises a plurality of electrodes. The groove disposed between the LED sub-chip and a second LED sub-chip, where the groove penetrates through the epitaxial layer separating the two sub-chips. The bridge insulating layer at least partially covering a sidewall of the groove, where the sidewall comprises a first surface and a second surface above the first surface, where the texture of the second surface is less granular than a texture of the first surface. The bridge electrode on the bridge insulating layer, where the bridge electrode connects respective electrodes of the two sub-chips at the first surface.

Abstract: Provided is a method for manufacturing a semiconductor wafer and a semiconductor wafer. The method includes: disposing a sacrificial layer on a first surface and a second surface of a patterned substrate, the patterned substrate comprising the first surface and the second surface having different normal directions; exposing the first surface by removing the first portion of the sacrificial layer disposed on the first surface; growing an original nitride buffer layer on the first surface and the second portion of the sacrificial layer; partially lifting off the second portion of the sacrificial layer disposed on the second surface such that at least one sub-portion of the second portion of the sacrificial layer remains on the second surface of the patterned substrate; and growing an epitaxial layer on the original nitride buffer layer, where a crystal surface of the epitaxial layer grows along a normal direction of the patterned substrate.